S3A3 datasheet(122/139 Pages) RENESAS

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R01DS0307EU0100 Rev.1.00

Page 122 of 139

Mar 7, 2017

S3A3

2. Electrical Characteristics

2.15

Flash Memory Characteristics

2.15.1

Code Flash Memory Characteristics

Note 1.

The reprogram/erase cycle is the number of erasures for each block. When the reprogram/erase cycle is n times (n = 1,000),

erasing can be done n times for each block. For instance, when 8-byte programming is performed 256 times for different

addresses in 2-KB blocks, and then the entire block is erased, the reprogram/erase cycle is counted as one. However,

programming the same address for several times as one erasure is not enabled (overwriting is prohibited).

Note 2.

Characteristic when using the flash memory programmer and the self-programming library provided by Renesas Electronics.

Note 3.

This result is obtained from reliability testing.

Note:

Does not include the time until each operation of the flash memory is started after instructions are executed by software.

Note:

The lower-limit frequency of FCLK is 1 MHz during programming or erasing the flash memory. When using FCLK at below

4 MHz, the frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer frequency such as 1.5 MHz cannot be set.

Note:

The frequency accuracy of FCLK must be ±3.5%. Confirm the frequency accuracy of the clock source.

Table 2.75

Code flash characteristics (1)

Parameter

Symbol

Min

Typ

Max

Unit

Test conditions

Reprogramming/erasure cycle*1

NPEC

1000

Times

Data hold time

After 1000 times of NPEC

tDRP

20*2, *3

--Year

Ta = +85°C

Table 2.76

Code flash characteristics (2)

High-speed operating mode

Conditions: VCC = 2.7 to 5.5 V

Parameter

Symbol

FCLK = 1 MHz

FCLK = 32 MHz

Unit

Min

Typ

Max

Min

Typ

Max

Programming time

8-byte

tP8

116

998

506

μs

Erasure time

2-KB

tE2K

9.03

287

5.67

222

Blank check time

8-byte

tBC8

56.8

16.6

μs

2-KB

tBC2K

1899

140

μs

Erase suspended time

tSED

22.5

10.7

μs

Startup area switching setting time

tSAS

21.7

585

12.1

447

Access window time

tAWS

21.7

585

12.1

447

OCD/serial programmer ID setting time

tOSIS

21.7

585

12.1

447

ROM mode transition wait time 1

tDIS

μs

ROM mode transition wait time 2

tMS

μs

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