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HT45FH5N Datasheet(PDF) 53 Page - Holtek Semiconductor Inc |
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HT45FH5N Datasheet(HTML) 53 Page - Holtek Semiconductor Inc |
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53 / 202 page  Rev. 1.00 5� �ove��e� 1�� �01� Rev. 1.00 53 �ove��e� 1�� �01� HT45F5N/HT45FH5N Power Bank ASSP Flash MCU HT45F5N/HT45FH5N Power Bank ASSP Flash MCU Watchdog Timer TheWatchdogTimerisprovidedtopreventprogrammalfunctionsorsequencesfromjumpingto unknownlocations,duetocertainuncontrollableexternaleventssuchaselectricalnoise. Watchdog Timer Clock Source TheWatchdogTimerclocksourceisprovidedbytheinternalclock,fLIRC,whichisinturnsupplied bytheLIRCoscillator.TheWatchdogTimersourceclockisthensubdividedbyaratioof28to218to givelongertimeouts,theactualvaluebeingchosenusingtheWS2~WS0bitsintheWDTCregister. TheLIRCinternaloscillatorhasanapproximatefrequencyof32kHzandthisspecifiedinternal clockperiodcanvarywithVDD,temperatureandprocessvariations. Watchdog Timer Control Register Asingleregister,WDTC,controlstherequiredtimeoutperiodaswellastheenableandMCU softwareresetoperation. WDTC Register Bit 7 6 5 4 3 2 1 0 �a�e WE4 WE3 WE� WE1 WE0 WS� WS1 WS0 R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 0 1 0 1 0 0 1 1 Bit7~3 WE4~WE0:WDTfunctionsoftwarecontrol 01010Bor10101B:Enabled Othervalues:ResetMCU When these bits are changed due to adverse environmental conditions, the microcontrollerwillbereset.TheresetoperationwillbeactivatedaftertSRESETtime andtheWRFbitintheCTRLregisterwillbesethigh. Bit2~0 WS2~WS0:WDTtime-outperiodselection 000:28/fLIRC 001:210/fLIRC 010:212/fLIRC 011:214/fLIRC 100:215/fLIRC 101:216/fLIRC 110:217/fLIRC 111:218/fLIRC Thesethreebitsdeterminethedivisionratioofthewatchdogtimersourceclock, whichinturndeterminesthetime-outperiod. CTRL Register Bit 7 6 5 4 3 2 1 0 �a�e FSYSO� — — — — LVRF LRF WRF R/W R/W — — — — R/W R/W R/W POR 0 — — — — x 0 0 "x" unknown Bit7 FSYSON:SystemclockfSYSControlinIDLEMode Describedelsewhere. Bit6~3 Unimplemented,readas"0" Bit2 LVRF:LVRfunctionresetflag Describedelsewhere. |
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