HT9B92 datasheet(9/25 Pages) HOLTEK

9 / 25 page

Rev. 1.20

November 25, 2015

HT9B92

Functional Description

Power-On Reset

Whenthepowerisapplied,thedeviceisinitialized

byaninternalpower-onresetcircuit.Thestatusofthe

internalcircuitsafterinitializationisasfollows:

• AllcommonoutputsaresettoVSS.

• AllsegmentoutputsaresettoVSS.

• LCDDriverOutputWaveform:A-typeinversion.

• Internaloscillatorisselected.

• The1/3biasdrivemodeisselected.

• LCDbiasgeneratorisinanoffstate.

• LCDDisplayandinternaloscillatorareinoffstates.

• Powersavemodeissettonormalcurrent.

• FrameFrequencyissetto80Hz.

• Blinkingfunctionisswitchedoff.

DatatransfersontheI2C-busshouldbeavoidedfor

1msfollowingpower-ontoallowcompletionofthe

resetaction.

System Oscillator

ThetimingfortheinternallogicandtheLCDdrive

signalsaregeneratedbytheinternaloscillatoror

external clock source input.The System Clock

frequency(fSYS)determinestheLCDframefrequency.

DuringinitialsystempowerontheSystemOscillator

willbeinthestopstate.

Segment Driver Outputs

TheLCDdrivesectionincludesupto36segment

outputsSEG0~SEG35whichshouldbeconnected

directlytotheLCDpanel.Thesegmentoutputsignals

aregeneratedinaccordancewiththemultiplexed

commonsignalsandwiththedataresidentinthe

displaylatch.Theunusedsegmentoutputsshouldbe

leftopen-circuit.

Column Driver Outputs

TheLCDdrivesectionincludes4columnoutputs

COM0~COM3whichshouldbeconnecteddirectly

totheLCDpanel.Thecolumnoutputsignalsare

generated in accordance with the selected LCD

drivemode.Theunusedcolumnoutputsshouldbe

leftopen-circuitiflessthan4columnoutputsare

required.

Address Pointer

TheaddressingmechanismforthedisplayRAMis

implementedusingtheaddresspointer.Thisallows

theloadingofanindividualdisplaydatabyte,ora

seriesofdisplaydatabytes,intoanylocationofthe

displayRAM.Thesequencecommenceswiththe

initializationoftheaddresspointerbytheDisplay

DataInputcommand.

Display Memory – RAM Structure

ThedisplayRAMisstatic36×4bitsRAMwhich

storestheLCDdata.Logic“1”intheRAMbit-map

indicatesthe“on”stateofthecorrespondingLCD

segment;similarly,logic0indicatesthe“off”state.

ThecontentsoftheRAMdataaredirectlymapped

totheLCDdata.ThefirstRAMcolumncorresponds

tothesegmentsoperatedwithrespecttoCOM0.In

multiplexedLCDapplicationsthesegmentdataofthe

second,thirdandfourthcolumnofthedisplayRAM

aretime-multiplexedwithCOM1,COM2andCOM3

respectively.Thefollowingdiagramisadatatransfer

formatforI2Cinterface.

MSB

LSB

SDA Data

Address n

Address n+1

COM0 COM1 COM2 COM3 COM0 COM1 COM2 COM3

Bit 0

Bit 1

Bit 2

Bit 3

Bit 4

Bit 5

Bit 6

Bit 7

LCD Display Output Data Transfer Format for I2C bus

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