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HT16E07 Datasheet(PDF) 5 Page - Holtek Semiconductor Inc |
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HT16E07 Datasheet(HTML) 5 Page - Holtek Semiconductor Inc |
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5 / 31 page  Rev. 1.00 5 June 19, 2017 HT16E07 No. Name X Y No. Name X Y No. Name X Y 50 S10 1218.120 296.000 106 S62 -293.880 296.000 162 S118 -1805.880 296.000 51 S11 1191.120 296.000 107 S63 -320.880 296.000 163 S119 -1832.880 296.000 52 S12 1164.120 296.000 108 S64 -347.880 296.000 164 S120 -1859.880 296.000 53 S13 1137.120 296.000 109 S65 -374.880 296.000 165 COMBG3 -1886.880 296.000 54 S14 1110.120 296.000 110 S66 -401.880 296.000 166 COMBG3 -1913.880 296.000 55 S15 1083.120 296.000 111 S67 -428.880 296.000 56 S16 1056.120 296.000 112 S68 -455.880 296.000 Pad Description Pad Name Type Description Power Supply Pins VDD — Logic power supply GND — Logic ground AVDD — Analog power supply AGND — Analog ground Charge Pump Controller Pins VDL O Driver low supply voltage – bypass to GND with 1μF capacitor VDH O Driver high supply voltage – bypass to GND with 1μF capacitor Serial Communication Interface Pins CSB I Chip select CSB="0" – device is active SDA I/O Serial data input/output pin SCL I Serial clock input pin Control Interface Pins RST_N I Reset pin – active low SHD_N I Charge pump enable pin – low shutdown BUSY_N O Busy flag output pin BUSY_N="0" – driver is busy, driver is refreshing the display BUSY_N="1" – driver is idle, host can send command/data to driver MS I Master or slave IC select pin MS="1" – device set as master MS="0" – device set as slave CL I/O System clock pin In the cascade mode, the master IC generates a clock signal for the slave IC via the CL pin when the cascade setting command is executed. In the single chip mode, this pin remains at a high level and is not used. VSYNC I/O Frame synchronization signal pin In the cascade mode, the master IC generates a vsync signal for the slave IC through the VSYNC pin when the cascade setting command is executed. In the single chip mode, this pin remains at a high level and is not used. TEST_N I Test pin, remains floating in normal mode Driver Output Pins S1~S120 O Segment driver output pins COMBG0~COMBG3 O Common or Background driver output pin These pins can be set as COM or BG pin separately by a CBS command |
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