TPS51100

SLUS600B − APRIL 2004 − REVISED NOVEMBER 2005

3A SINK/SOURCE DDR

TERMINATION REGULATOR

1

www.ti.com

FEATURES

Includes Droop Compensation

Capacitance

Power Dissipation

VTT and VTTREF

APPLICATIONS

DESCRIPTION

The TPS51100 is a 3-A sink/source tracking

termination regulator. It is specifically designed for

low-cost/low-external component count systems,

where space is a premium.

The TPS51100 maintains fast transient response

only requiring 20-

µF (2 × 10µF) of ceramic output

capacitance. The TPS51100 supports remote

sensing functions and all features required to

power the DDR and DDR2 VTT bus termination

according to the JEDEC specification. In addition,

the TPS51100 includes integrated sleep-state

controls placing VTT in High-Z in S3 (suspend to

RAM) and soft-off for VTT and VTTREF in S5

(suspend to disk). The TPS51100 is available in

the thermally efficient 10-pin MSOP PowerPAD



and is specified from −40

°C to 85°C.

ORDERING INFORMATION

TA

PLASTIC MSOP POWER PAD

(DGQ)(1)

−40

°C to 85°C

TPS51100DGQ

(1) The DGQ package is also available taped and reeled. Add

an R suffix to the device type (i.e., TPS51100DGQR). See

the application section of the data sheet for PowerPAD

drawing and layout information.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Copyright

 2004, Texas Instruments Incorporated

UDG−04015

C1

2

y 10 µF

C2

0.1

µF

1

2

3

4

10

9

8

7

VIN

S5

GND

S3

VDDQSNS

VLDOIN

PGND

VTT

TPS51100DGQ

5

6

VTTREF

VTTSNS

S3

VTTREF

5V_IN

S5

Cap

C1

C2

Manuf

TDK

TDK

Part Number

C2012JB0J106K

C1608JB1H104K