WM8199 datasheet(9/32 Pages) CIRRUS

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WM8199

Production Data

PD, Rev 4.4, July 2008

INPUT VIDEO SAMPLING

MCLK

VSMP

INPUT

VIDEO

PER

VSMPSU

VSMPH

VSU

RSU

MCLKL

MCLKH

Figure 3 Input Video Timing

Note:

See Page 20 (Programmable VSMP Detect Circuit) for video sampling description.

Test Conditions

AVDD = DVDD1 = 5.0V, DVDD2 = 3.3V, AGND = DGND = 0V, TA = 25

°C unless otherwise stated.

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNITS

MCLK period

tPER

MCLK high period

tMCLKH

11.3

14.1

MCLK low period

tMCLKL

11.3

14.1

VSMP set-up time

tVSMPSU

VSMP hold time

tVSMPH

Video level set-up time

tVSU

Video level hold time

tVH

Reset level set-up time

tRSU

Reset level hold time

tRH

Notes:

tVSU and tRSU denote the set-up time required after the input video signal has settled.

Parameters are measured at 50% of the rising/falling edge.

OUTPUT DATA TIMING

MCLK

OP[7:0]

Figure 4 Output Data Timing

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