HCPL7520 datasheet(11/15 Pages) HP

11 / 15 page

As shown in Figure 17, 0.1

µF

bypass capacitors (C1, C2)

should be located as close as

possible to the pins of the

HCPL-7520. The bypass

capacitors are required because

of the high-speed digital nature

of the signals inside the HCPL-7520.

A 0.01

µF bypass capacitor (C2) is

also recommended at the input due

to the switched-capacitor nature

of the input circuit. The input

bypass capacitor also forms part

of the anti-aliasing filter, which is

recommended to prevent high

frequencynoisefromaliasingdownto

lower frequencies and interfering

with the input signal. The input filter

also performs an important

reliability function—it reduces

transient spikes from ESD events

flowing through the current

sensing resistor.

PC Board Layout

The design of the printed circuit

board (PCB) should follow good

layout practices, such as keeping

bypass capacitors close to the

supply pins, keeping output

signals away from input signals,

the use of ground and power

planes, etc. In addition, the

layout of the PCB can also affect

the isolation transient immunity

(CMTI) of the HCPL-7520,

due primarily to stray capacitive

coupling between the input and

the output circuits. To obtain

optimal CMTI performance, the

layout of the PC board should

minimize any stray coupling by

maintaining the maximum

possible distance between the

input and output sides of the

circuit and ensuring that any

ground or power plane on the

PC board does not pass directly

below or extend much wider than

the body of the HCPL-7520.

Figure 17. Recommended HCPL-7520 application circuit.

MOTOR

HV-

HV+

RSENSE

FLOATING

POSITIVE

SUPPLY

GATE DRIVE

CIRCUIT

HCPL-7520

0.1 µF

0.01 µF

Ω

OUT

0.1 µF

78L05

VDD1

VIN+

VIN-

GND1

VDD2

VOUT

VREF

GND2

A/D

VREF

GND

µC

C6 = 150 pF

C4 = C5 = 0.1 µF

+5 V

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