LM5010SD datasheet(14/19 Pages) NSC

14 / 19 page

Applications Information (Continued)

(10)

The minimum ESR for C2 is then equal to:

If the capacitor used for C2 does not have sufficient ESR, R3

is added in series as shown in Figure 1. C2 should generally

be no smaller than 3.3 µF, although that is dependent on the

frequency and the allowable ripple amplitude at V

OUT1. Ex-

perimentation is usually necessary to determine the mini-

mum value for C2, as the nature of the load may require a

larger value. A load which creates significant transients re-

quires a larger value for C2 than a non-varying load.

D1: The important parameters are reverse recovery time and

forward voltage drop. The reverse recovery time determines

how long the current surge lasts each time the buck switch is

turned on. The forward voltage drop is significant in the

event the output is short-circuited as it is mainly this diode’s

voltage (plus the voltage across the current limit sense re-

sistor) which forces the inductor current to decrease during

the off-time. For this reason, a higher voltage is better,

although that affects efficiency. A reverse recovery time of

)30 ns, and a forward voltage drop of )0.75V are preferred.

The reverse leakage specification is important as that can

significantly affect efficiency. Other types of diodes may have

a lower forward voltage drop, but may have longer recovery

times, or greater reverse leakage. D1 should be rated for the

maximum V

IN, and for the peak current when in current limit

PK in Figure 11) which is equal to:

PK = 1.5A + IOR(max) = 1.734A

where 1.5A is the maximum guaranteed current limit thresh-

old, and the maximum ripple current was previously calcu-

lated as 234 mAp-p. Note that this calculation is valid only

when R

CL is not required.

C1: Assuming the voltage supply feeding V

IN has a source

impedance greater than zero, this capacitor limits the ripple

voltage at V

IN while supplying most of the switch current

during the on-time. At maximum load current, when the buck

switch turns on, the current into V

IN increases to the lower

peak of the output current waveform, ramps up to the peak

value, then drops to zero at turn-off. The average current into

IN during this on-time is the load current. For a worst case

calculation, C1 must supply this average load current during

the maximum on-time. The maximum on-time is calculated

using Equation 5, with a 25% tolerance added:

C1 is calculated from:

where I

O is the load current, and

∆V is the allowable ripple

voltage at V

IN (1V for this example). Quality ceramic capaci-

tors with a low ESR should be used for C1. To allow for

capacitor tolerances and voltage effects, a 2.2 µF capacitor

will be used

C3: The capacitor at the V

CC pin provides not only noise

filtering and stability, but also prevents false triggering of the

CC UVLO at the buck switch on/off transitions. For this

reason, C3 should be no smaller than 0.1 µF, and should be

a good quality, low ESR, ceramic capacitor. This capacitor

also determines the initial startup delay (t1 in Figure 8).

C4: The recommended value for C4 is 0.022 µF. A high

quality ceramic capacitor with low ESR is recommended as

C4 supplies the surge current to charge the buck switch gate

at turn-on. A low ESR also ensures a complete recharge

during each off-time.

C5: This capacitor suppresses transients and ringing due to

long lead inductance at V

IN. A low ESR, 0.1 µF ceramic chip

capacitor is recommended, located physically close to the

LM5010.

C6: The capacitor at the SS pin determines the softstart

time, i.e. the time for the reference voltage at the regulation

comparator, and the output voltage, to reach their final value.

The time is determined from the following:

Fora5ms softstart time, C6 calculates to 0.022 µF.

FINAL CIRCUIT

The final circuit is shown in Figure 14, and its performance is

shown in Figures 15 - 18.

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