NA72 is a 7-input NAND gate with 2x drive strength.

Truth Table

Q

D

B

C

E

F

G

A

Capacitance

AB

C

D

E

F

G

Q

Ci (pF)

L

XXX

XX

X

H

A

0.034

X

L

XX

XX

X

H

B

0.023

XX

L

X

XX

X

H

C

0.031

XXX

L

X

X

X

H

D

0.036

XXXX

L

X

X

H

E

0.025

XXXX

X

L

X

H

F

0.027

XXXX

XX

L

H

G

0.031

HHHH

HH

H

L

Area

Power

1.22 mils

2

4.23 µW / MHz

Delay [ns] = tpd.. = f(SL, L)

with SL = Input Slope [ns] ; L = Output Load [pF]

Output Slope [ns] = op_sl.. = f(L)

with L = Output Load [pF]

AC Characteristics :

Tj = 25°C

VDD = 3.3V

Typical Process

AC Characteristics

Characteristics

Symbol

SL = 0.1

SL = 2.0

L = 0.2

L = 1.4

L = 2.0

L = 0.2

L = 1.4

L = 2.0

Delay A to Q

tpdar

1.03

2.39

3.11

1.38

2.75

3.40

tpdaf

0.89

2.02

2.58

0.99

2.13

2.66

Delay B to Q

tpdbr

1.09

2.44

3.17

1.45

2.82

3.53

tpdbf

0.92

2.05

2.60

0.96

2.11

2.63

Delay C to Q

tpdcr

1.14

2.49

3.22

1.52

2.91

3.59

tpdcf

0.93

2.07

2.59

0.89

2.03

2.57

Delay D to Q

tpddr

0.97

2.33

3.00

1.32

2.68

3.42

tpddf

0.88

2.01

2.59

0.95

2.06

2.61

Delay E to Q

tpder

1.05

2.40

3.14

1.42

2.77

3.51

tpdef

0.93

2.04

2.63

0.95

2.10

2.65

Delay F to Q

tpdfr

1.13

2.47

3.22

1.50

2.84

3.58

tpdff

0.95

2.09

2.64

0.93

2.06

2.60

Delay G to Q

tpdgr

1.22

2.59

3.30

1.57

2.96

3.60

tpdgf

0.96

2.08

2.67

0.89

2.02

2.57

Output Slope A to Q

op_slar

0.96

5.30

7.31

0.91

5.13

7.51

op_slaf

0.73

3.72

5.08

0.73

3.62

4.97

Sept. 1996

- 242 -

Rev. N/C

Austria Mikro S ysteme International

R

0.6 µm CMOS

CUB

NA72

NA72