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SN74LVC16374ADLR Datasheet(PDF) 3 Page - Texas Instruments

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Part # SN74LVC16374ADLR
Description  16 BIT EDGE TRIGGERED D TYPE FLIP FLOP WITH 3 STATE OUTPUTS
PDF  17 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

SN74LVC16374ADLR Datasheet(HTML) 3 Page - Texas Instruments

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1OE
1CLK
1D1
To Seven Other Channels
1Q1
2OE
2CLK
2D1
2Q1
To Seven Other Channels
1
48
47
24
25
36
C1
1D
13
2
C1
1D
Pin numbers shown are for the DGG, DGV, and DL packages.
Absolute Maximum Ratings
(1)
SN74LVC16374A
16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH 3-STATE OUTPUTS
SCAS728A – OCTOBER 2003 – REVISED OCTOBER 2005
FUNCTION TABLE
(EACH FLIP-FLOP)
INPUTS
OUTPUT
Q
OE
CLK
D
L
↑
H
H
L
↑
L
L
L
H or L
X
Q0
H
X
X
Z
LOGIC DIAGRAM (POSITIVE LOGIC)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCC
Supply voltage range
–0.5
6.5
V
VI
Input voltage range(2)
–0.5
6.5
V
VO
Voltage range applied to any output in the high-impedance or power-off state(2)
–0.5
6.5
V
VO
Voltage range applied to any output in the high or low state(2)(3)
–0.5
VCC + 0.5
V
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±50
mA
Continuous current through each VCC or GND
±100
mA
DGG package
70
DGV package
58
θ
JA
Package thermal impedance(4)
DL package
63
°C/W
GQL/ZQL package
42
GRD/ZRD package
36
Tstg
Storage temperature range
–65
150
°C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3)
The value of VCC is provided in the recommended operating conditions table.
(4)
The package thermal impedance is calculated in accordance with JESD 51-7.
3



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