TPIC5302

3-CHANNEL INDEPENDENT POWER DMOS ARRAY

SLIS029B – APRIL 1994 – REVISED SEPTEMBER 1995

POST OFFICE BOX 655303

3

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

td(on)

Turn-on delay time

23

46

td(off)

Turn-off delay time

VDD = 25 V,

RL = 50 Ω,tr1 = 10 ns,

25

50

ns

tr2

Rise time

DD

,

tf1 = 10 ns,

L

,

See Figure 2

r1

,

5

10

ns

tf2

Fall time

17

34

Qg

Total gate charge

V48 V

I0 5 A

V10 V

8

9.8

Qgs(th) Threshold gate-to-source charge

VDS = 48 V,

See Figure 3

ID = 0.5 A,

VGS = 10 V,

0.5

0.63

nC

Qgd

Gate-to-drain charge

See Figure 3

1.5

1.85

LD

Internal drain inductance

5

nH

LS

Internal source inductance

5

nH

Rg

Internal gate resistance

0.25

Ω

thermal resistance

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

R

θJA

Junction-to-ambient thermal resistance

All outputs with equal power

See Note 4

115

°C/W

R

θJP

Junction-to-pin thermal resistance

All outputs with equal power,

See Note 4

32

°C/W

NOTE 4: Package mounted on an FR4 printed-circuit board with no heat sink

PARAMETER MEASUREMENT INFORMATION

IRM†

25% of IRM†

Reverse di/dt = 100 A/

µs

trr(SD)

† IRM = maximum recovery current

1

0.5

0

– 0.5

– 1

– 1.5

– 2

– 2.5

– 3

Time – ns

0

25

50

75

100

125

150

175

200

225

250

TJ = 25°C

Figure 1. Reverse-Recovery-Current Waveform of Source-to-Drain Diode