S-24C256C

13

6. 2 Page write

The page write mode allows up to 64 bytes to be written in a single write operation in the S-24C256C.

Its basic process to transmit data is as same as byte write, but it operates page write by sequentially receiving

8-bit write data as much data as the page size has.

When the S-24C256C receives a 7-bit device address and a 1-bit read / write instruction code set to “0”, following

a start condition, it generates an acknowledge. And the S-24C256C receives a upper 8-bit word address, and

responds with an acknowledge. Then the S-24C256C receives a lower 8-bit word address, and responds with an

acknowledge. After the S-24C256C receives 8-bit write data and responds with an acknowledge, it receives 8-bit

write data corresponding to the next word address, and generates an acknowledge. The S-24C256C repeats

reception of 8-bit write data and generation of acknowledge in succession. The S-24C256C can receive as many

write data as the maximum page size.

Receiving a stop condition initiates a write cycle of the area starting from the designated memory address and

having the page size equal to the received write data.

A2 A1 A0

S

T

A

R

T

1 0 1 0

W

R

I

T

E

DEVICE

ADDRESS

UPPER

WORD ADDRESS (n)

R

/

W

M

S

B

SDA LINE

A

C

K

L

S

B

LOWER

WORD ADDRESS (n)

0

X

W7 W6 W5 W4 W3 W2 W1 W0

DATA (n)

D7

D0

S

T

O

P

W12 W11 W10 W9 W8

A

C

K

W13

A

C

K

DATA (n+x)

D7

D0

W14

Figure 13 Page Write

In the S-24C256C, the lower 6 bits of the word address are automatically incremented every time when the

S-24C256C receives 8-bit write data. If the size of the write data exceeds 64 bytes, the upper 9 bits of the word

address remain unchanged, and the lower 6 bits are rolled over and the last 64-byte data that the S-24C256C

received will be overwritten.