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IC-HT Datasheet(PDF) 43 Page - IC-Haus GmbH

Part # IC-HT
Description  DUAL CW LASER DIODE DRIVER
PDF  45 Pages
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Manufacturer  ICHAUS [IC-Haus GmbH]
Direct Link  http://www.ichaus.biz
Logo ICHAUS - IC-Haus GmbH

IC-HT Datasheet(HTML) 43 Page - IC-Haus GmbH

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iC-HT
DUAL CW LASER DIODE DRIVER
Rev B1, Page 43/45
General configuration registers
RDCO
Addr. 0x1B; bit 5:0
R/W 0x02
0x00
No current
. . .
0x3F
140 µA Typ (see spec point D01)
Table 118: DCO current control
MERGE
Addr. 0x1B; bit 6
R/W 0
0
Channel 1 and 2 operate independently
1
Power transistor from channel 2 usable in parallel
with channel 1, regulation made by channel 1.
Table 119: Channel combination
MODE(1:0)
Addr. 0x1C; bit 1:0
R/W 01
00
Not allowed, signaled as memory error
01
Chip set in operation mode
(apply configuration, latch transparent)
10
Chip set in configuration mode
(hold previous configuration)
11
Not allowed, signaled as memory error
Table 120: Configuration and operation mode
MOSCERR
Addr. 0x1D; bit 0
R/W 0
0
Oscillator error (watchdog) will be signaled at
NCHK
1
Oscillator error (watchdog) will not be signaled at
NCHK
Table 121: Oscillator watchdog error mask
MMONC
Addr. 0x1D; bit 1
R/W 1
0
MONC1 and MONC2 event
will be signaled at NCHK
1
MONC1 and MONC2 event
will not be signaled at NCHK
Table 122: Monitor channel 1 and 2 event mask
MLDKSAT1
Addr. 0x1D; bit 2
R/W 1
0
LDKSAT1 event will be signaled at NCHK
1
LDKSAT1 event will not be signaled at NCHK
Table 123: LDK saturation error mask channel 1
MLDKSAT2
Addr. 0x1D; bit 3
R/W 1
0
LDKSAT2 event will be signaled at NCHK
1
LDKSAT2 event will not be signaled at NCHK
Table 124: LDK saturation error mask channel 2
SOVT
Addr. 0x1D; bit 4
R/W 0
0
No overtemperature event is simulated.
1
Overtemperature event simulated.
Table 125: Simulate overtemperature
SOVC1
Addr. 0x1D; bit 5
R/W 0
0
No Overcurrent event at channel 1 is simulated.
1
Overcurrent event at channel 1 simulated.
Table 126: Simulate overcurrent channel 1
SOVC2
Addr. 0x1D; bit 6
R/W 0
0
No overcurrent event at channel 2 is simulated.
1
Overcurrent event at channel 2 simulated.
Table 127: Simulate overcurrent channel 2
SOSCERR
Addr. 0x1D; bit 7
R/W 0
0
No oscillator error simulated.
1
Oscillator error simulated (watchdog timeout).
Table 128: Simulate oscillator error



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