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EC5601 Datasheet(PDF) 5 Page - E-CMOS Corporation

Part # EC5601
Description  High Slew Rate Rail-to-Rail Single Operational Amplifiers with OTP
PDF  11 Pages
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Manufacturer  E-CMOS [E-CMOS Corporation]
Direct Link  http://www.ecmos.com.tw/
Logo E-CMOS - E-CMOS Corporation

EC5601 Datasheet(HTML) 5 Page - E-CMOS Corporation

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EC5601
High Slew Rate Rail-to-Rail Single
Operational Amplifiers with OTP
2010/11/29
Page 5 of 11
JA
Amax
Jmax
Θ
T
-
T
Figure 2. Operation with Beyond-the Rails Input
Power Dissipation
The EC5601 is designed for maximum output
current capability. Even though momentary output
shorted to ground causes little damage to device.
For the high drive amplifier EC5601, it is possible
to
exceed
the
'absolute-maximum
junction
temperature' under certain load current conditions.
Therefore, it is important to calculate the maximum
junction temperature for the application to determine
if load conditions need to be modified for the
amplifier to remain in the safe operating area. The
maximum power dissipation allowed in a package is
determined according to:
PDmax =
Where:
TJmax = Maximum Junction Temperature
TAmax= Maximum Ambient Temperature
ΘJA = Thermal Resistance of the Package
PDmax = Maximum Power Dissipation in the Package.
The maximum power dissipation actually produced
by an IC is the total quiescent supply current times
the total power supply voltage, plus the power in the
IC due to the loads, or:
PDmax =∑i[VS * ISmax + (VS+ – VO) * IL]
When sourcing, and
PDmax = ∑i[VS * ISmax + (VO – VS-) * IL]
When sinking.
Where:
i = 1 to 1
VS = Total Supply Voltage
ISmax = Maximum Supply Current Per Amplifier
VO = Maximum Output Voltage of the Application
IL= Load current
RL= Load Resistance = (VS+ – VO)/IL = (VO – VS-)/ IL
A calculation for RL to prevent device from
overheat can be easily solved by setting the two
PDmax equations equal to each other.
Driving Capacitive Loads
The EC5601 is designed to drive a wide range of
capacitive loads. In addition, the output current
handling capability of the device allows for good
slewing characteristics even with large capacitive
loads. The combination of these features make the
EC5601 ideally for applications such as TFT LCD
panel grayscale reference voltage buffers, ADC input
amplifiers, etc.
As load capacitance increases, however, the -3dB
bandwidth of the device will decrease and the
peaking increase. Depending on the application, it
must be necessary to reduce peaking and to improve
device stability. To improve device stability, a small
v al u e of series resistor (usually between 5Ωand
50Ω) must be placed in series with the output.
The advantage is that it improves the settling and
overshooting performance with very large capacitive
loads. Figure 3. shows the typical
application
configuration.
Figure 3. Typical Application Configuration.
Power Supply Bypassing and Printed Circuit
Board Layout
With high phase margin, the EC5601 performs
stable gain at high frequency. Like any high-
frequency device, good layout of the printed circuit
board usually comes with optimum performance.
Ground plane construction is highly recommended,
lead lengths should be as short as possible and the
power supply pins must be well bypassed to reduce
the risk of oscillation. For normal single supply
operation, where the VS- pin is connected to ground,
a 0.1 µF ceramic capacitor should be placed from
VS+ pin to VS- pin as a bypassing capacitor. A 4.7µF
tantalum capacitor should then be connected in
parallel, placed in the region of the amplifier. One
4.7µF capacitor may be used for multiple devices.
This same capacitor combination should be placed at
each supply pin to ground if split supplies are to be
used.



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