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LM98503CCVV Datasheet(PDF) 5 Page - National Semiconductor (TI) |
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LM98503CCVV Datasheet(HTML) 5 Page - National Semiconductor (TI) |
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5 / 25 page ![]() www.national.com 5 Pin Descriptions (continued) Legend: (I=Input), (O=Output), (IO=Bi-directional), (P=Power), (D=Digital), (A=Analog) Pin Name I/O Typ Description 30 D4 O D Digital output. Bit 4 of 9 of the digital video output bus. 31 D5 O D Digital output. Bit 5 of 9 of the digital video output bus. 32 D6 O D Digital output. Bit 6 of 9 of the digital video output bus. 33 D7 O D Digital output. Bit 7 of 9 of the digital video output bus. 34 D8 O D Digital output. Bit 8 of 9 of the digital video output bus. 35 D9 O D Digital output. Bit 9 of 9 (MSB) of the digital video output bus. 36 DV+ I/O P +3 Volt power supply for the digital output driver circuits. Bypass each supply pin with 0.1 µF and 10µF capacitors in parallel. 37 DGND I/O P Digital output driver ground return. 38 DGND P Digital ground return. 39 DV+ P +3 Volt power supply for the digital circuits. Bypass each supply pin with 0.1 µF and 10µF capacitors in parallel. 40 AV+ P +3 Volt power supply for the analog circuits. Bypass each supply pin with 0.1 µF and 10 µF capacitors in parallel. 41 AGND P Analog ground return. 42 VREFT IO A Top of ADC reference ladder. Normally bypassed with a 0.1 µF capacitor and 10µF capacitors in parallel. An external ADC reference voltage may be applied to this pin. 43 AV+ P +3 Volt power supply for the analog circuits. Bypass each supply pin with 0.1 µF and 10 µF capacitors in parallel. 44 AGND P Analog ground return. 45 AOUT- O A Negative differential analog output from correlated double sampler or PGA (selectable through the serial interface). 46 AOUT+ O A Positive differential analog output from correlated double sampler or PGA (selectable through the serial interface). 47 AV+ P +3 Volt power supply for the analog circuits. Bypass each supply pin with 0.1 µF and 10 µF capacitors in parallel. 48 AGND P Analog ground return. |
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