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LT1738

1738fa

Approximately 50

µA of current can be sourced from this

pin if VGCL < VIN – 0.8V.

This pin also controls undervoltage lockout of the gate

drive. If the pin is tied to a zener or voltage source, the gate

drive will not be enabled until VIN > VGCL + 0.8V. If this pin

is tied to VIN, then undervoltage lockout is disabled.

There is an internal 19V zener tied from this pin to ground

to provide a fail-safe for maximum gate voltage.

Slew Control

CAP (Pin 2): This pin is the feedback node for the external

voltage slewing capacitor. Normally a small 1pf to 5pf

capacitor is connected from this pin to the drain of the

MOSFET.

The voltage slew rate is inversely proportional to this

capacitance and proportional to the current that the part

will sink and source on this pin. That current is inversely

proportional to RVSL.

RCSL (Pin 15): A resistor to ground sets the current slew

rate for the external drive MOSFET during switching. The

minimum resistor value is 3.3k and the maximum value is

68k. The time to slew between on and off states of the

MOSFET current will determine how the di/dt related

harmonics are reduced. This time is proportional to RCSL

and RS (the current sense resistor) and maximum current.

Longer times produce a greater reduction of higher fre-

quency harmonics.

RVSL (Pin 16): A resistor to ground sets the voltage slew

rate for the drain of the external drive MOSFET. The

minimum resistor value is 3.3k and the maximum value is

68k. The time to slew between on and off states on the

MOSFET drain voltage will determine how dv/dt related

harmonics are reduced. This time is proportional to RVSL,

CV and the input voltage. Longer times produce more

rolloff of harmonics. CV is the equivalent capacitance from

CAP to the drain of the MOSFET.

Switch Mode Control

SS (Pin 3): The SS pin allows for ramping of the switch

current threshold at startup. Normally a capacitor is placed

on this pin to ground. An internal 9

µA current source will

charge this capacitor up. The voltage on the VC pin cannot

exceed the voltage on SS. Thus peak current will ramp up

as the SS pin ramps up. During a short circuit fault the SS

pin will be discharged to ground thus reinitializing soft-

start.

When SS is below the VC clamp voltage the VC pin will

closely track the SS pin.

This pin can be left open if not used.

CS (Pin 4): This is the input to the current sense amplifier.

It is used for both current mode control and current

slewing of the external MOSFET. Current sense is accom-

plished via a sense resistor (RS) connected from the

source of the external MOSFET to ground. CS is connected

to the top of RS. Current sense is referenced to the GND

pin.

The switch maximum operating current will be equal to

0.1V/RS. At CS = 0.1V, the gate driver will be immediately

turned off (no slew control).

If CS = 0.22V in addition to the drivers being turned off, VC

and SS will be discharged to ground (short-circuit protec-

tion). This will hasten turn off on subsequent cycles.

FB (Pin 9): The feedback pin is used for positive voltage

sensing. It is the inverting input to the error amplifier. The

noninverting input of this amplifier connects internally to

a 1.25V reference.

If the voltage on this pin exceeds the reference by 220mV,

then the output driver will immediately turn off the external

MOSFET (no slew control). This provides for output over-

voltage protection

When this input is below 0.9V then the current sense

blanking will be disabled. This will assist start up.

NFB (Pin 10): The negative feedback pin is used for

sensing a negative output voltage. The pin is connected to

the inverting input of the negative feedback amplifier

through a 100k source resistor. The negative feedback

amplifier provides a gain of –0.5 to the FB pin. The nominal

regulation point would be –2.5V on NFB. This pin should

be left open if not used.

If NFB is being used then overvoltage protection will occur

at 0.44V below the NFB regulation point.

At NFB < –1.8 current sense blanking will be disabled.

PI FU CTIO S

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