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A3938SLD Datasheet(PDF) 8 Page - Allegro MicroSystems |
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A3938SLD Datasheet(HTML) 8 Page - Allegro MicroSystems |
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8 / 11 page ![]() 8 Worcester, Massachusetts 01615-0036 (508) 853-5000 115 Northeast Cutoff, Box 15036 www.allegromicro.com A3938 Three-Phase Power MOSFET Controller each commutation. If a stalled motor results from a fault, the fault can only be cleared by toggling the RESET pin or by a power-up sequence. Current Regulation. Load current can be regulated by an internal fixed off-time, PWM-control circuit. When the outputs of the MOSFETs are turned on, current increases in the motor winding until it reaches a value given by: I TRIP = VREF / RSENSE At the trip point, the sense comparator resets the source enable latch, turning off the source driver. At this point, load inductance causes the current to recirculate for the fixed off- time period. The current path during recirculation is deter- mined by the configuration of the MODE and SR input pins. The fixed off-time is determined by an external resistor, R T, and capacitor, C T, connected in parallel from the RC terminal to AGND. The fixed off-time is approximated by: t OFF = RT × C T t OFF should be in the range between 10 µs and 50 µs. Larger values for t OFF could result in audible noise problems. For proper circuit operation, 10 kΩ < R T < 500 kΩ. Torque control can be implemented by varying the REF input voltage as long as the PWM input stays high. If direct control of the torque/current is desired by PWM input, a voltage can be applied to the REF pin to set an absolute maximum cur- rent limit. PWM Blank. The capacitor C T also serves as the means to set the BLANK time duration. At the end of a PWM off-cycle, a high-side gate selected by the commutation logic turns on. At this time, large current transients can occur dur- ing the reverse recovery time, t rr, of the intrinsic body diodes of the power MOSFETs. To prevent false tripping of the sense comparator, the BLANK function disables the com- parator for a time period defined by: t BLANK = 1.9 × C T / (1 × 10-3 – [2 / R T]) The user must ensure that C T is large enough to cover the current spike duration. Braking. The A3938 dynamically brakes the motor by forcing all low-side power MOSFETs on, and all high-side power MOSFETs off. This effectively short-circuits the BEMF and brakes the motor. During braking, the load cur- rent can be approximated by: I BRAKEPEAK = VBEMF / RLOAD As the current does not flow through the sense resistor dur- ing a dynamic brake, care should be taken to ensure that the maximum ratings of the power MOSFETs are not exceeded. Note: On its rising edge, a RESET setting of 1 overrides the BRAKE input pin and latches the condition selected by the BRKSEL pin. Power Loss Brake. The BRKCAP and BRKSEL pins provide a power-down braking option. A Power-Loss Brake Trigger Event, which is either an undervoltage on VREG or a RESET = 1 rising edge, is sensed by the A3938, which then dynamically brakes or coasts (depending on the stored BRKSEL setting) the motor. The reservoir capacitor on the BRKCAP pin provides the positive voltage that forces the low-side gates of the power MOSFETs high, keeping them on, even after supply voltage is lost. A stored setting of BRK- SEL = 1 brakes the motor, but a stored setting of BRKSEL = 0 coasts it. The combined effect of these settings is shown in the table Brake Control. BRAKE BRKSEL Before Power Loss Brake Trigger Event After Power Loss Brake Trigger Event 0 0 Normal run mode Coast mode – All gate drive outputs OFF 0 1 Normal run mode Brake mode – All low-side gate drivers ON 1 0 Brake mode – All low-side gate drivers ON Coast mode – All gate drive outputs OFF 1 1 Brake mode – All low-side gate drivers ON Brake mode – All low-side gate drivers ON Brake Control |
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