TUSB564I datasheet(31/45 Pages) TI1

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TUSB564

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SLLSF29A – OCTOBER 2017 – REVISED OCTOBER 2017

Product Folder Links: TUSB564

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Typical Application (continued)

9.2.1 Design Requirements

For this design example, use the parameters shown in Table 19.

Table 19. Design Parameters

PARAMETER

VALUE

A to B PCB trace length, XAB

12 inches

C to D PCB trace length, XCD

12 inches

E to F PCB trace length, XEF

2 inches

G to H PCB trace length, XGH

2 inches

PCB trace width

4 mils

AC-coupling capacitor (75 nF to 265 nF)

100 nF

VCC supply (3 V to 3.6 V)

3.3 V

I2C Mode or GPIO Mode

I2C Mode. (I2C_EN pin != "0")

1.8V or 3.3V I2C Interface

3.3V I2C. Pull-up the I2C_EN pin to 3.3V with a 1K

ohm resistor. CTL1, EQ[1:0], SSEQ[1:0], and

DPEQ[1:0] pin unconnected.

EQ setting for DisplayPort Lanes

EQ Setting # 5 (Register 0x0A[4] = 1'b1, 0x10 =

0x55; 0x11 = 0x55)

EQ setting for Downstream USB Data Path

EQ Setting # 6 (Register 0x0A[4] = 1'b1, 0x20 =

0x66)

EQ setting for Upstream USB Data Path

EQ Setting # 6 (Register 0x0A[4] = 1'b1, 0x21 =

0x08)

9.2.2 Detailed Design Procedure

A typical usage of the TUSB564 device is shown in Figure 27. The device can be controlled either through its

GPIO pins or through its I2C interface. In the example shown below, a Type-C PD controller is used to configure

the device through the I2C interface. In I2C mode, the equalization settings for each receiver can be

independently controlled through I2C registers. For this reason, the configuration pin CTL1 and all of the

equalization pins (EQ[1:0], SSEQ[1:0], and DPEQ[1:0]) can be left unconnected. If these pins are left

unconnected, the TUSB564 7-bit I2C slave address will be 0x12 because both DPEQ/A1 and SSEQ0/A0 will be

at pin level "F". If a different I2C slave address is desired, DPEQ/A1 and SSEQ0/A0 pins should be set to a level

which produces the desired I2C slave address.

TUSB564I Datasheet(PDF) 31 Page - Texas Instruments

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