Unipolar Output

Figure 7 shows the MAX5236/MAX5237 configured for

unipolar, rail-to-rail operation with a gain of 1.6384V/V.

The MAX5237 produces a 0 to 4.092V output with 2.5V

reference, while the MAX5236 produces a range of 0 to

2.046V output with a 1.25V reference. Table 4 lists the

unipolar output codes.

Bipolar Output

The MAX5236/MAX5237 can be configured for a bipo-

lar output, as shown in Figure 8. The output voltage is

given by the equation:

where NB represents the numeric value of the DAC’s

binary input code. Table 5 shows digital codes and the

corresponding output voltage for Figure 8’s circuit.

Using an AC Reference

In applications where the reference has an AC signal

component, the MAX5236/MAX5237 have multiplying

capabilities within the reference input voltage range

specifications. Figure 9 shows a technique for applying

a sinusoidal input to REF_, where the AC signal is offset

before being applied to the reference input.

Digital Calibration and

Threshold Selection

Figure 10 shows the MAX5236/MAX5237 in a digital

calibration application. With a bright light value applied

to the photodiode (on), the DAC is digitally ramped until

it trips the comparator. The microprocessor (µP) stores

this “high” calibration value. Repeat the process with a

dim light (off) to obtain the dark current calibration. The

µP then programs the DAC to set an output voltage at

Single-Supply 3V/5V, Voltage-Output, Dual,

Precision 10-Bit DACs

______________________________________________________________________________________

13

16-BIT SERIAL WORD

C2

C1

C0

D9..............D0

S2, S1,

S0*

FUNCTION

0

0

1

10-bit DAC data

000

Load input register A; DAC registers are unchanged.

0

1

0

10-bit DAC data

000

Load input register A; all DAC registers are updated.

0

1

1

10-bit DAC data

000

Load all DAC registers from the shift register (start up both DACs

with new data, and load the input registers).

1

0

0

X X X X X X X X X X

000

Update both DAC registers from their respective input registers

(start up both DACs with data previously stored in the input

registers).

1

0

1

10-bit DAC data

000

Load input register B; DAC registers are unchanged.

1

1

0

10-bit DAC data

000

Load input register B; all DAC registers are updated.

1

1

1

P1A P1B X X X X X X X X

000

Power down both DACs respectively according to bits P1A and

P1B (see Table 3). Internal bias remains active.

0

0

0

0 0 1 X X X X X X X

000

Update DAC register A from input register A (start up DAC A with

data previously stored in input register A).

0

0

0

0 1 1 P1A P1B X X X X X

000

Full power-down. Power down the main bias generator and

power down both DACs respectively according to bits P1A and

P1B (see Table 3).

0

0

0

1 0 1 X X X X X X X

000

Update DAC register B from input register B (start up DAC B with

data previously stored in input register B).

0

0

0

1 1 0 P1A X X X X X X

000

Power down DAC A according to bit P1A (see Table 3).

0

0

0

1 1 1 P1B X X X X X X

000

Power down DAC B according to bit P1B (see Table 3).

Table 2. Serial Interface Programming Commands

P1(A/B)

SHUTDOWN MODE

0

Shut down with internal 1k

Ω load to GND

1

Shut down with internal 200k

Ω load to GND

Table 3. P1 Shutdown Modes

X = Don’t care.

* = S2, S1, and S0 must be zero for proper operation.