MSP430A005IPW datasheet(13/47 Pages) TI

13 / 47 page

MSP430x11x2, MSP430x12x2

MIXED SIGNAL MICROCONTROLLER

SLAS361D − JANUARY 2002 − REVISED AUGUST 2004

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

peripherals

Peripherals are connected to the CPU through data, address, and control busses and can be handled using

all instructions. For complete module descriptions, see the MSP430x1xx Family User’s Guide, literature number

SLAU049.

oscillator and system clock

The clock system in the MSP430x11x2 and MSP430x12x2 devices is supported by the basic clock module that

includes support for a 32768-Hz watch crystal oscillator, an internal digitally-controlled oscillator (DCO) and a

high frequency crystal oscillator. The basic clock module is designed to meet the requirements of both low

system cost and low-power consumption. The internal DCO provides a fast turn-on clock source and stabilizes

in less than 6

µs. The basic clock module provides the following clock signals:

D Auxiliary clock (ACLK), sourced from a 32768-Hz watch crystal or a high frequency crystal.

D Main clock (MCLK), the system clock used by the CPU.

D Sub-Main clock (SMCLK), the sub-system clock used by the peripheral modules.

digital I/O

There are 3 8-bit I/O ports implemented—ports P1, P2, and P3 (only six port P2 I/O signals are available on

external pins; port P3 is implemented only on ’x12x2 devices):

D All individual I/O bits are independently programmable.

D Any combination of input, output, and interrupt conditions is possible.

D Edge-selectable interrupt input capability for all the eight bits of ports P1 and six bits of port P2.

D Read/write access to port-control registers is supported by all instructions.

NOTE:

Six bits of port P2, P2.0 to P2.5, are available on external pins, but all control and data bits for port

P2 are implemented. Port P3 has no interrupt capability. Port P3 is implemented in MSP430x12x2

only.

brownout

The brownout circuit is implemented to provide the proper internal reset signal to the device during power on

and power off.

watchdog timer

The primary function of the watchdog timer (WDT) module is to perform a controlled system restart after a

software problem occurs. If the selected time interval expires, a system reset is generated. If the watchdog

function is not needed in an application, the module can be configured as an interval timer and can generate

interrupts at selected time intervals.

USART0 (MSP430x12x2 Only)

The MSP430x12x2 devices have one hardware universal synchronous/asynchronous receive transmit

(USART0) peripheral module that is used for serial data communication. The USART supports synchronous

SPI (3 or 4 pin) and asynchronous UART communication protocols, using double-buffered transmit and receive

channels.

ADC10

The ADC10 module supports fast, 10-bit analog-to-digital conversions. The module implements a 10-bit SAR

core, sample select control, reference generator and data transfer controller, or DTC, for automatic conversion

result handling allowing ADC samples to be converted and stored without any CPU intervention.

MSP430A005IPW Datasheet(PDF) 13 Page - Texas Instruments

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