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AD7193 Datasheet(PDF) 52 Page - Analog Devices |
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AD7193 Datasheet(HTML) 52 Page - Analog Devices |
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52 / 57 page ![]() Data Sheet AD7193 Rev. E | Page 51 of 56 Figure 65 shows the filter response when FS[9:0] is set to 5 and the post filter averages by 16. In this case, the output data rate is equal to 53.33 Hz when the first filter notch is placed at 60 Hz. The rejection at 60 Hz ± 0.5 Hz is equal to 40 dB minimum. –120 –110 –100 –90 –80 –70 –60 –50 –40 –30 –20 –10 0 0 30 60 90 120 150 FREQUENCY (Hz) Figure 65. Filter Response for Average + Decimate Filter (Sinc3 Filter, FS[9:0] = 5, Average by 16) Simultaneous 50 Hz/60 Hz rejection is achieved when FS[9:0] is set to 30 and the postfilter averages by 16. The output data rate is equal to 8.9 Hz whereas the rejection at 50 Hz ± 0.5 Hz and 60 Hz ± 0.5 Hz is typically 42 dB. –120 –110 –100 –90 –80 –70 –60 –50 –40 –30 –20 –10 0 0 306090 120 150 FREQUENCY (Hz) Figure 66. Filter Response for Average + Decimate Filter (Sinc3 Filter, FS[9:0] = 30, Average by 16) Simultaneous 50 Hz and 60 Hz rejection is also achieved by using an FS word of 96 and averaging by 16, which places a notch at 50 Hz. Setting the REJ60 bit to 1 places a notch at 60 Hz (see Figure 67). The output data rate is reduced to 2.78 Hz with this configuration, but the rejection is improved to 94 dB typically at 50 Hz ± 1 Hz and 60 Hz ± 1 Hz. –120 –110 –100 –90 –80 –70 –60 –50 –40 –30 –20 –10 0 0 30 60 90 120 150 FREQUENCY (Hz) Figure 67. Filter Response for Average + Decimate Filter (Sinc3 Filter, FS[9:0] = 96, Average by 16) FAST SETTLING MODE (CHOP ENABLED) Chop can be enabled in the fast settling mode. With chop enabled, the ADC offset and offset drift are minimized. The analog input pins are continuously swapped. With the analog input pins connected in one direction, the settling time of the sinc filter is allowed and a conversion is recorded. The analog input pins are then inverted, and another settled conversion is obtained. Subsequent conversions are averaged so that the offset is minimized. This continuous swapping of the analog input pins and the averaging of subsequent conversions means that the offset drift is also minimized. Chopping does not change the output data rate. However, the settling time equals tSETTLE = 2/fADC Consequently, if chop is enabled, the sinc4 filter is selected, FS[9:0] is set to 6, averaging by 16 is enabled, and the output data rate is equal to 42.1 Hz. Therefore, the conversion time equals 1/42.10 Hz or 23.75 ms, and the settling time is equal to 47.5 ms. |
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