Electronic Components Datasheet Search
  English  ▼

X  

WM8976 Datasheet(PDF) 67 Page - Wolfson Microelectronics plc

Part # WM8976
Description  Low Power CODEC With Speaker Driver
PDF  83 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8976 Datasheet(HTML) 67 Page - Wolfson Microelectronics plc

Back Button WM8976 Datasheet HTML 63Page - Wolfson Microelectronics plc WM8976 Datasheet HTML 64Page - Wolfson Microelectronics plc WM8976 Datasheet HTML 65Page - Wolfson Microelectronics plc WM8976 Datasheet HTML 66Page - Wolfson Microelectronics plc WM8976 Datasheet HTML 67Page - Wolfson Microelectronics plc WM8976 Datasheet HTML 68Page - Wolfson Microelectronics plc WM8976 Datasheet HTML 69Page - Wolfson Microelectronics plc WM8976 Datasheet HTML 70Page - Wolfson Microelectronics plc WM8976 Datasheet HTML 71Page - Wolfson Microelectronics plc Next Button
Zoom Inzoom in Zoom Outzoom out
 67 / 83 page
background image
Preliminary Technical Data
WM8976
w
PTD Rev 2.0 February 2005
67
The VMID_EN signal has an OR function performed with the normal VMID driver enable. If the
VMID_EN signal is to have no effect to normal functionality when jack detection is enabled, it should
set to 0 for both enables.
If jack detection is not enabled, the output enables default to all 1’s, allowing the outputs to be
controlled as normal via the normal output enables found in table 37, similarly the VMID_EN signal
defaults to 0 allowing the VMID driver to be controlled via the normal enable bit.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
5:4
JD_SEL
00
Pin selected as jack detection input
00 = GPIO1
01 = GPIO2
10 = Reserved
11 = Reserved
6
JD_EN
0
Jack Detection Enable
0=disabled
1=enabled
R9
GPIO control
8:7
JD_VMID
00
[7] VMID_EN_0
[8] VMID_EN_1
3:0
JD_EN0
0
Output enables when selected jack
detection input is logic 0.
[0]= OUT1_EN_0
[1]= OUT2_EN_0
[2]= OUT3_EN_0
[3]= OUT4_EN_0
R13
7:4
JD_EN1
0
Output enables when selected jack
detection input is logic 1
[4]= OUT1_EN_1
[5]= OUT2_EN_1
[6]= OUT3_EN_1
[7]= OUT4_EN_1
Table 56 Jack Detect Register Control Bits



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com