PI6CU877 datasheet(4/11 Pages) PERICOM

4 / 11 page

PS8689B

08/05/04

PI6CU877

PLL Clock Driver for

1.8V DDR2 Memory

DC Specifications Recommended Operating Conditions

Symbol

Parameter

Min.

Typ.

Max.

Units

VDDQ

Output supply Voltage

1.7

1.8

1.9

AVDD

Supply voltage(4)

VDDQ

VIL

Low-level input voltage(5)

OE, OS, CK, CK

0.35 x

VDDQ

VIH

High-level input voltage(5)

OE, OS, CK, CK

0.65 x

VDDQ

IOH

High-level output current, see Fig 2

-9

IOL

Low-level output current, see Fig. 2

VIX

Input differential-pair crossing voltage

(VDDQ/2)

-0.15

(VDDQ/2)

-0.15

VIN

Input voltage level

-0.3

VDDQ +0.3

VID

Input differenital voltage, See Fig 9 (5)

0.3

VDDQ +0.4

0.6

VDDQ +0.4

Operating free air temperature

ºC

Notes:

4. The PLL is turned off and bypassed for test purposes when AVDD is grounded. During this test mode, VDDQ remains within the recommended

operating conditions and no timing parameters are guaranteed.

5. VID is the magnitude of the difference between the input level on CK and the input level on CK, see Figure 9 for definition. The CK and CK,

VIH and VIL limits are used to define the DC low and high levels for the logic detect state.

Absolute Maximum Ratings (Over operating free-air temperature range)

Symbol

Parameter

Min.

Max.

Units

VDDQ, AVDD

I/O supply voltage range and analog /core supply voltage range

-0.5

2.5

Input voltage range

-0.5

VDDQ

+0.5

Output voltage range

-0.5

IIK

Input clamp current

-50

IOK

Output clamp current

-50

Continuous output current

-50

IO(PWR)

Continuous current through each VDDQ or GND

-100

100

TSTG

Storage temperature

-65

150

ºC

Note:

Stress beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device.

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