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MP3276AP Datasheet(PDF) 1 Page - Exar Corporation |
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MP3276AP Datasheet(HTML) 1 Page - Exar Corporation |
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1 / 16 page ![]() MP3276 1 Rev. 4.00 Fault Protected 16 Channel, 12-Bit Data Acquisition Subsystem FEATURES • Fault Protected 16-Channel 12-Bit A/D Converter with Sample & Hold, Reference, Clock and 3-state Outputs • Fast Conversion, less than 15µS • Microprocessor Bus Interface • 2’s Complement Data Output • Parallel or Serial Data Output Modes • 65 ns Bus Access Time • Remote Analog Ground Sensing • Overvoltage Protected Input (50 V over the Sup- ply Voltages) • Precision Reference for Long Term Stability and Low Gain T.C. • Guaranteed Linearity Over Temperature • Guaranteed Performance at +12/–5 V, ±12 & ±15 V • Low Power: 110 mW typ. (7 mW per Channel typ.) • 32 Channel Version: MP3274 GENERAL DESCRIPTION The MP3276 is a complete 16-channel, 12-bit Data Acquisi- tion Subsystem with 3-state output buffers for direct interfacing to 16-bit microprocessor buses. Implemented using an ad- vanced BiCMOS process, the converter combines a 16-channel passive overvoltage protected multiplexer instrumentation amp, a sample & hold, a SAR, a 12-bit decoded D/A, a comparator, a precision reference and the control logic to achieve an accurate repeated conversion in less than 15 µs, and a mux/instrumenta- tion amp settling period of less than 10 µs. A unique input design provides input overvoltage protection to 50 V over the supply voltages. The circuit design can allow for an overvoltage condition on unselected channels without dis- rupting the measured channel or operation of the MP3276! The internal 4 V reference has sufficient output current to provide other system reference needs. Precision thin film scaling and offset resistors are laser trimmed to provide for less than 2 LSB INL for +10 V inputs on all channels. In addition, the MP3276 will output either full scale (0111 ....) for overrange and – full scale (1000....) for underrange condi- tions. This greatly simplifies microprocessor software develop- ment. SIMPLIFIED BLOCK DIAGRAM – + Comp SAR 4 V REF 16 4 16 Ch. MUX AB0-3 (4 pins) AIN0-15 (16 pins) REF OUT Control Logic GND REF. DGND VEE VDAC Latch/ Shift Register 3-state Drivers 12 DB0-DB11 REF IN /2 12 VDD VCC CLK WR RD CS PXS ADEN STL STS AGND VREF AGND2 AGND3 AGND GND REF IN |
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