AD7949 datasheet(21/32 Pages) AD

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Data Sheet

AD7949

Rev. F | Page 21 of 32

POWER SUPPLY

The AD7949 uses two power supply pins: an analog and digital

core supply (VDD) and a digital input/output interface supply

(VIO). VIO allows direct interface with any logic between 1.8 V

and VDD. To reduce the supplies needed, the VIO and VDD

pins can be tied together. The AD7949 is independent of power

supply sequencing between VIO and VDD. Additionally, it is

very insensitive to power supply variations over a wide

frequency range, as shown in Figure 33.

10k

100

FREQUENCY (kHz)

Figure 33. PSRR vs. Frequency

The AD7949 powers down automatically at the end of each

conversion phase; therefore, the operating currents and power

scale linearly with the sampling rate. This makes the part ideal

for low sampling rates (even of a few hertz) and low battery-

powered applications.

10,000

1000

100

0.1

0.010

0.001

100

10k

100k

SAMPLING RATE (SPS)

VDD = 5V, INTERNAL REF

VDD = 5V, EXTERNAL REF

VDD = 2.5V, EXTERNAL REF

VIO

Figure 34. Operating Currents vs. Sampling Rate

SUPPLYING THE ADC FROM THE REFERENCE

For simplified applications, the AD7949, with its low operating

current, can be supplied directly using an external reference

circuit like the one shown in Figure 35. The reference line can

be driven by:



The system power supply directly



A reference voltage with enough current output capability,

such as the ADR430/ADR431/ADR433/ADR434/ADR435

or ADR440/ADR441/ADR443/ADR444/ADR445



A reference buffer, such as the AD8605, which can also

filter the system power supply, as shown in Figure 35

AD8605

AD7949

VIO

REF

VDD

10µF

1µF

0.1µF

10Ω

10kΩ

1µF

1OPTIONAL REFERENCE BUFFER AND FILTER.

0.1µF

Figure 35. Example of an Application Circuit

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