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M52036SP Datasheet(PDF) 9 Page - Renesas Technology Corp |
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M52036SP Datasheet(HTML) 9 Page - Renesas Technology Corp |
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9 / 14 page ![]() M52036SP Rev.1.0, Sep.22.2003, page 9 of 13 2) Comp Sync/H sync, V sync input Connect the composite sync input to pin [6]. For the separate sync input, connect H and V to pins[6] and [8] respectively. The bias and impedance at pins [6] and [8] are 6 V and 10 k Ω, respectively. Waveform shaping and polarity detection are performed by a double threshold converter installed inside. The internal circuit is as shown in Fig.B. The average DC voltage is set to approximately 0.7 V higher and lower than V2. Thus, as shown in Fig. A, this processor is energized by an input signal 0.7 Vp-p or over when the duty ratio is small. On the other hand, approximately 1.4 Vp-p is suitable when the duty ratio is large. Fig. C indicates an allowable standard value for the input duty. |
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