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MM58241 Datasheet(PDF) 3 Page - National Semiconductor (TI) |
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MM58241 Datasheet(HTML) 3 Page - National Semiconductor (TI) |
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3 / 8 page ![]() AC Electrical Characteristics TA eb40 Cto a85 C VDD e 5V g05V Symbol Parameter Conditions Min Typ Max Units Clock Input (Notes 3 and 4) fC Frequency 800 kHz tH High Time 300 ns tL Low Time 300 ns Data Input tDS Set-Up Time 100 ns tDH Hold Time 100 ns Enable Input tES Set-Up Time 100 ns tEH Hold Time 100 ns Data Output CL e 50 pF CLOCK Low to Data Out 500 ns tCDO Time Note 2 For timing purposes the signals ENABLE and BLANK can be considered to be totally independent of each other Note 3 AC input waveform specification for test purposes tr tf s 20 ns f e 800 kHz 50% g10% duty cycle Note 4 Clock input rise and fall times must not exceed 5 ms Connection Diagrams Dual-In-Line Package TLF5600 – 2 Top View FIGURE 2 Order Number MM58241N or MM58241V See NS Package Number N40A or V44A Plastic Chip Carrier TLF5600 – 8 Top View Functional Description This product is specifically designed to drive multiplexed or non-multiplexed high voltage alphanumeric or dot matrix vacuum fluorescent (VF) displays Character generation is done externally in the microprocessor with a serial data path to the display driver The MM58421 uses three signals DATA IN CLOCK and ENABLE where ENABLE acts as an external load signal Display blanking can be achieved by means of the BLANKING CONTROL input and a logic ‘1’ will turn off all sections of the display A block diagram of the MM58241 is shown in Figure 1 Figure 2 shows the pinout of the MM58241 device where output 1 (pin 18) is equivalent to bit 1 ie the first bit of data to be loaded into the shift register following ENABLE high A logic ‘1’ at the input will turn on the corresponding display digitsegmentdot output A significant reduction in discrete board components can be achieved by use of the MM58241 because external pull- down resistors are not required Due to the nature of the output stage both its on and off impedance values vary as a function of the display voltage applied However Figures 3a and 3b show that this output impedance will remain con- stant for a fixed value of display voltage 3 |
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