AD7719_17 datasheet(23/41 Pages) AD

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REV. A

AD7719

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Operating Characteristics when Addressing the Mode and

Control Registers

1. Any change to the MD bits will immediately reset both ADCs.

A write to the MD2–0 bits with no change is also treated as a

reset. (See exception to this in Note 3.)

2. If AD0CON is written when AD0EN = 1, or if AD0EN is

changed from 0 to 1, both ADCs are also immediately reset. In

other words, the main ADC is given priority over the aux ADC

and any change requested on main is immediately responded to.

3. On the other hand, if AD1CON is written to, only the aux

ADC is reset. For example, if the main ADC is continuously

converting when the aux ADC change or enable occurs, the

main ADC continues undisturbed. Rather than allow the aux

ADC to operate with a phase difference from the main ADC,

the aux ADC will fall into step with the outputs of the main

ADC. The result is that the first conversion time for the aux

channel will be delayed up to three outputs while the aux ADC

update rate is synchronized to the main ADC.

4. Once the MODE has been written with a calibration mode,

the RDY0/1 bits (STATUS) are immediately reset and the

calibration commences. On completion, the appropriate calibra-

tion registers are written, the relevant bits in STATUS are

written, and the MD2–0 bits are reset to 001 to indicate the

ADC is back in Idle mode.

5. Any calibration request of the aux ADC while the temperature

sensor is selected will fail to complete.

6. Calibrations are performed with the maximum allowable SF

value. SF register is reset to user configuration after calibration.

Main ADC Control Register (AD0CON): (A3, A2, A1, A0 = 0,

0, 1, 0; Power-On Reset = 0x07)

The main ADC control register is an 8-bit register from which data

can be read or to which data can be written. This register is used to

configure the main ADC for range, channel selection, 16-/24-bit

operation, and unipolar or bipolar coding. Table XIII outlines

the bit designations for the main ADC control register. AD0CON7

through AD0CON0 indicate the bit location, AD0CON denoting

the bits are in the main ADC control register. AD0CON7 denotes

the first bit of the data stream. The number in parentheses

indicates the power-on/reset default status of that bit.

Table XIII. Main ADC Control Register (AD0CON) Bit Designations

Bit Location

Bit Name

Description

AD0CON7

AD0EN

Main ADC Enable Bit.

Set by user to enable the main ADC. When set, the main ADC operates according to the MD bits in

the mode register.

Cleared by the user to power down the Main ADC.

AD0CON6

16-/24-Bit Operating Mode.

Set by user to enable 16-bit mode. The conversion results from the main ADC will be rounded to

16 bits and the main ADC data register will be 16 bits wide.

Cleared by user to enable 24-bit mode. The conversion results from the main ADC will be rounded to

24 bits and the main ADC data register will be 24 bits wide.

AD0CON5

CH1

Main ADC Channel Selection Bits.

AD0CON4

CH0

Written by the user to select the differential input pairs used by the main ADC as follows:

(Note: The CHCON bit resides in the Mode register.)

CHCON

CH1

CH0

Positive Input

Negative Input

Calibration Register Pair

AIN1

AIN2

AIN3

AIN4

AIN2

AIN3

AIN2

AIN1

AIN4

AIN3

AIN4

AIN2

AIN4

AD0CON3

Main ADC Unipolar/Bipolar Bit.

Set by user to enable unipolar coding, i.e., zero differential input will result in 0x00 0000 output and

a full-scale differential input will result in 0xFF FFFF output when operated in 24-bit mode.

Cleared by user to enable bipolar coding, Negative full-scale differential input will result in an output

code of 0x00 0000, zero differential input will result in an output code of 0x80 0000, and a

Positive full-scale differential input will result in an output code of 0xFF FFFF.

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