ADN2811 datasheet(3/16 Pages) AD

3 / 16 page

REV. A

ADN2811

–3–

Parameter

Conditions

Min

Typ

Max

Unit

CML OUTPUTS (CLKOUTP/N, DATAOUTP/N)

Single-Ended Output Swing

VSE (See Figure 3)

300

455

600

Differential Output Swing

VDIFF (See Figure 3)

600

910

1200

Output High Voltage

VOH

VCC

Output Low Voltage

VOL

VCC – 0.6

VCC – 0.3

Rise Time

20%–80%

150

Fall time

80%–20%

150

Setup Time

TS (See Figure 1)

OC-48

140

Hold Time

TH (See Figure 1)

OC-48

150

REFCLK DC INPUT CHARACTERISTICS

Input Voltage Range

@ REFCLKP or REFCLKN

VCC

Peak-to-Peak Differential Input

100

Common-Mode Level

DC-Coupled, Single-Ended

VCC/2

TEST DATA DC INPUT

CHARACTERISTICS

4 (TDINP/N)

CML Inputs

Peak-to-Peak Differential Input Voltage

0.8

LVTTL DC INPUT CHARACTERISTICS

Input High Voltage

VIH

2.0

Input Low Voltage

VIL

0.8

Input Current

VIN = 0.4 V or VIN = 2.4 V

–5

LVTTL DC OUTPUT CHARACTERISTICS

Output High Voltage

VOH, IOH = –2.0 mA

2.4

Output Low Voltage

VOL, IOL = +2.0 mA

0.4

NOTES

1PIN and NIN should be differentially driven, ac-coupled for optimum sensitivity.

2PWD measurement made on quantizer outputs in BYPASS mode.

3Measurement is equipment limited.

4TDINP/N are CML inputs. If the drivers to the TDINP/N inputs are anything other than CML, they must be ac-coupled.

Specifications subject to change without notice.

ADN2811 Datasheet(PDF) 3 Page - Analog Devices

ADN2811 Datasheet(HTML) 3 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

Datasheet Download

Link URL