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CS6422-CS Datasheet(PDF) 43 Page - Cirrus Logic |
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CS6422-CS Datasheet(HTML) 43 Page - Cirrus Logic |
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43 / 48 page ![]() CS6422 43 NI - Network Interface Input, Pin 17 Input to the network side analog-to-digital converter (far-end input/receive input). This input expects a single-pole RC anti-aliasing filter with a corner frequency of 8 kHz. Maximum signal level before clipping at this point is 0.9 Vrms (2.5 Vpp), assuming default settings for RGain. Microcontroller Interface RST - Active Low Reset Input, Pin 5 When RST is held low, the CS6422 is put into a low power mode with all functional blocks idle. When RST goes high, the CS6422 is started in a known state. DRDY - Active Low Microcontroller Interface Data Ready Input, Pin 6 DRDY is a low pulse used to gate valid input data into the Microcontroller Interface. STROBE - Microcontroller Interface Clock Input, Pin 7 The rising edge of STROBE latches DATA into the Microcontroller Interface while DRDY is low. DATA - Microcontroller Interface Data Input, Pin 8 DATA is latched into the Microcontroller Interface on the rising edge of STROBE. Clock CLKI - Clock Oscillator Input, Pin 14 A 20.480 MHz parallel-resonant crystal should be connected between CLKI and CLKO. Alternatively, CLKI may be driven directly with an 20.480 MHz CMOS level clock. CLKO - Clock Oscillator Output, Pin 13 A 20.480 MHz parallel-resonant crystal should be connected between CLKI and CLKO. CLKO must be left floating if CLKI is driven directly with a CMOS level clock. Power Supply AVDD - Analog Supply, Pin 1 +5 Volt analog power supply. AGND - Analog Ground, Pin 2 Analog ground reference. DVDD - Digital Supply, Pin 16 +5 Volt digital power supply. DGND - Digital Ground, Pin 15 Digital ground reference. CS6422 DS295F1 43 |
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