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DP8308 Datasheet(PDF) 3 Page - National Semiconductor (TI) |
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DP8308 Datasheet(HTML) 3 Page - National Semiconductor (TI) |
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3 / 6 page  DC Electrical Characteristics (Notes 2 and 3) (Continued) Symbol Parameter Conditions Min Typ Max Units CONTROL INPUTS T R VIH Logical ‘‘1’’ Input Voltage 20 V VIL Logical ‘‘0’’ Input Voltage DP8308 08 V DP7308 07 V IIH Logical ‘‘1’’ Input Current VIH e 27V 05 20 m A II Maximum Input Current VCC e Max VIH e 525V 10 mA IIL Logical ‘‘0’’ Input Current VIL e 04V R b 01 b 025 mA T b 025 b 05 mA VCLAMP Input Clamp Voltage IIN eb12 mA b 08 b 15 V POWER SUPPLY CURRENT ICC Power Supply Current T e R e 20V VIN e 04V VCC e Max 70 100 mA T e VINA e 04V R e 2V VCC e Max 90 140 mA AC Electrical Characteristics VCC e 5V TA e 25 C Symbol Parameter Conditions Min Typ Max Units A PORT DATAMODE SPECIFICATIONS tPDHLA Propagation Delay to a Logical ‘‘0’’ from T e 24V R e 04V (Figure A) 14 18 ns B Port to A Port R1 e 1k R2 e 5k C1 e 30 pF tPDLHA Propagation Delay to a Logical ‘‘1’’ from T e 24V R e 04V (Figure A) 13 18 ns B Port to A Port R1 e 1k R2 e 5k C1 e 30 pF tPLZA Propagation Delay from a Logical ‘‘0’’ to B0 to B7 e 04V T e 24V (Figure B) 11 15 ns TRI-STATE from R to A Port S3 e 1 R5 e 1k C4 e 15 pF tPHZA Propagation Delay from a Logical ‘‘1’’ to B0 to B7 e 24V T e 24V (Figure B) 815 ns TRI-STATE from R to A Port S3 e 0 R5 e 1k C4 e 15 pF tPZLA Propagation Delay from TRI-STATE to B0 to B7 e 04V T e 24V (Figure B) 24 35 ns a Logical ‘‘0’’ from R to A Port S3 e 1 R5 e 1k C4 e 30 pF tPZHA Propagation Delay from TRI-STATE to B0 to B7 e 24V T e 24V (Figure B) 21 30 ns a Logical ‘‘1’’ from R to A Port S3 e 0 R5 e 5k C4 e 30 pF B PORT DATAMODE SPECIFICATIONS tPDHLB Propagation Delay to a Logical ‘‘0’’ from T e 04V R e 24V (Figure A) A Port to B Port R1 e 100X R2 e 1k C1 e 300 pF 18 23 ns R1 e 667X R2 e 5k C1 e 45 pF 11 18 ns tPDLHB Propagation Delay to a Logical ‘‘1’’ from T e 04V R e 24V (Figure A) A Port to B Port R1 e 100X R2 e 1k C1 e 300 pF 16 23 ns R1 e 667X R2 e 5k C1 e 45 pF 11 18 ns tPLZB Propagation Delay from a Logical ‘‘0’’ to A0 to A7 e 04V R e 24V (Figure B) 13 18 ns TRI-STATE from T to B Port S3 e 1 R5 e 1k C4 e 15 pF tPHZB Propagation Delay from a Logical ‘‘1’’ to A0 to A7 e 24V R e 24V (Figure B) 815 ns TRI-STATE from T to B Port S3 e 0 R5 e 1k C4 e 15 pF tPZLB Propagation Delay from TRI-STATE to A0 to A7 e 04V R e 24V (Figure B) a Logical ‘‘0’’ from T to B Port S3 e 1 R5 e 100X C4 e 300 pF 25 35 ns S3 e 1 R5 e 667X C4 e 45 pF 17 25 ns tPZHB Propagation Delay from TRI-STATE to A0 to A7 e 24V R e 24V (Figure B) a Logical ‘‘1’’ from T to B Port S3 e 0 R5 e 1k C4 e 300 pF 24 35 ns S3 e 0 R5 e 5k C4 e 45 pF 17 25 ns http www nationalcom 3 |
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