SLG46722 datasheet(39/83 Pages) DIALOG

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SLG46722

10.0 Combination Function Macro Cells

The SLG46722 has two combination function macrocells that can serve more than one logic or timing function. In each case, they

can serve as a Look Up Table (LUT), or as another logic or timing function. See the list below for the functions that can be

implemented in these macrocells;

•

One macrocell that can serve as either 2-bit LUT or as D Flip Flop

•

One macrocell that can serve as either 3-bit LUT or as Pipe Delay

Inputs/Outputs for the two combination function macrocells are configured from the connection matrix with specific logic functions

being defined by the state of NVM bits. When used as a LUT to implement combinatorial logic functions, the outputs of the LUTs

can be configured to any user defined function, including the following standard digital logic devices (AND, NAND, OR, NOR,

XOR, XNOR).

10.1 2-Bit LUT or D Flip Flop Macrocells

There is one macrocell that can serve as either a 2-bit LUT or as a D Flip Flop. When used to implement LUT function, the 2-bit

LUT takes in two input signals from the connection matrix and produce a single output, which goes back into the connection

matrix.

When used to implement D Flip Flop function, the two input signals from the connection matrix go to the data (d) and

clock (clk) inputs for the Flip Flop, with the output going back to the connection matrix.

10.1.1 2-Bit LUT or D Flip Flop Macrocells Used as 2-Bit LUTs

Figure 9. 2-bit LUT0 or DFF4

DFF4

clk

2-bit LUT0

OUT

IN0

IN1

To Connection

Matrix Input <36>

4-bits NVM

From Connection Matrix Output <70>

1-bit NVM

reg <575:572>

reg <596>

From Connection Matrix Output <69>

Q/nQ

reg <573> Output Select (Q or nQ)

Table 44. 2-bit LUT0 Truth Table.

IN1

IN0

OUT

reg <572>

reg <573>

reg <574>

reg <575>

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