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SLG46722 Datasheet(PDF) 2 Page - Dialog Semiconductor |
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SLG46722 Datasheet(HTML) 2 Page - Dialog Semiconductor |
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2 / 83 page ![]() 000-0046722-111 Page 1 of 82 SLG46722 1.0 Overview The SLG46722 provides a small, low power component for commonly used mixed-signal functions. The user creates their circuit design by programming the one time Non-Volatile Memory (NVM) to configure the interconnect logic, the I/O Pins and the macro cells of the SLG46722. This highly versatile device allows a wide variety of mixed-signal functions to be designed within a very small, low power single integrated circuit. The macro cells in the device include the following: • Fifteen Combinatorial Look Up Tables (LUTs) • Five 2-bit LUTs • Nine 3-bit LUTs • One 4-bit LUT • Two Combination Function Macro cell • One Selectable FF/Latch or 2-bit LUT • One Selectable Pipe Delay or 3-bit LUT • Pipe Delay – 16 stage / 3 output • Eight Counter / Delay Generators (CNT/DLY) • One 14-bit delay/counter • One 14-bit delay/counter with external clock/reset • Four 8-bit delays/counters • Two 8-bit delays/counters with external clock/reset • Six D Flip-Flop / Latches (DFF) • Pipe Delay – 16 stage/3 output (Part of Combination Function Macrocell) • Programmable Delay • Additional Logic Functions – 2 Deglitch Filters • RC Oscillator (RC OSC) |
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