STM8S001J3 datasheet(17/84 Pages) STMICROELECTRONICS

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STM8S001J3

Functional overview

Independent watchdog timer

The independent watchdog peripheral can be used to resolve processor malfunctions due to

hardware or software failures.

It is clocked by the 128 kHz LSI internal RC clock source, and thus stays active even in case

of a CPU clock failure

The IWDG time base spans from 60 µs to 1 s.

4.8

Auto wakeup counter

•

Used for auto wakeup from active halt mode

•

Clock source: internal 128 kHz internal low frequency RC oscillator or external clock

•

LSI clock can be internally connected to TIM1 input capture channel 1 for calibration

4.9

TIM1 - 16-bit advanced control timer

This is a high-end timer designed for a wide range of control applications. With its

complementary outputs, dead-time control and center-aligned PWM capability, the field of

applications is extended to lighting and half-bridge driver.

•

16-bit up, down and up/down autoreload counter with 16-bit prescaler

•

Four independent capture/compare channels (CAPCOM) configurable as input

capture, output compare, PWM generation (edge and center aligned mode) and single

pulse mode output

•

Synchronization module to control the timer with external signals

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Break input to force the timer outputs into a defined state

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One complementary output (CH1 with CH1N option) with adjustable dead time

•

Interrupt sources: 3 x input capture/output compare, 1 x overflow/update, 1 x break

4.10

TIM2 - 16-bit general purpose timer

•

16-bit autoreload (AR) up-counter

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15-bit prescaler adjustable to fixed power of 2 ratios 1…32768

•

3 individually configurable capture/compare channels

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PWM mode

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Interrupt sources: 3 x input capture/output compare, 1 x overflow/update

4.11

TIM4 - 8-bit basic timer

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8-bit autoreload, adjustable prescaler ratio to any power of 2 from 1 to 128

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Clock source: CPU clock

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Interrupt source: 1 x overflow/update

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