AD9278BBCZ datasheet(3/45 Pages) AD

3 / 45 page

AD9278

Data Sheet

Rev. A | Page 2 of 44

TABLE OF CONTENTS

Features .............................................................................................. 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

AC Specifications.......................................................................... 3

Digital Specifications ................................................................... 6

Switching Specifications .............................................................. 7

ADC Timing Diagrams ............................................................... 8

Absolute Maximum Ratings............................................................ 9

Thermal Impedance..................................................................... 9

ESD Caution.................................................................................. 9

Pin Configuration and Function Descriptions........................... 10

Typical Performance Characteristics ........................................... 13

TGC Mode................................................................................... 13

CW Doppler Mode..................................................................... 16

Equivalent Circuits......................................................................... 17

Ultrasound Theory of Operation ................................................. 19

Channel Overview.......................................................................... 20

TGC Operation........................................................................... 20

CW Doppler Operation............................................................. 33

Serial Port Interface (SPI).............................................................. 37

Hardware Interface..................................................................... 37

Memory Map .................................................................................. 39

Reading the Memory Map Table.............................................. 39

Reserved Locations .................................................................... 39

Default Values............................................................................. 39

Logic Levels................................................................................. 39

Outline Dimensions....................................................................... 43

Ordering Guide .......................................................................... 43

REVISION HISTORY

/12—Rev. 0 to Rev. A

Changes to SNR in Features Section.............................................. 1

Added Mode IV to Table 1 and Table 1 Conditions .................... 3

Added Mode IV Clock Rate Parameters and Changed tEH and tEL

from 6.25 ns to 4.8 ns; Table 3................................................................... 7

Changes to Active Impedance Matching Section....................... 23

Added Table 9.................................................................................. 24

Changes to Figure 56 and Figure 57............................................. 28

Changes to Digital Outputs and Timing Section ....................... 30

Changes to 0x01 Bits[7:0] Description, Changes to 0x02 Bits[5:4]

Description and Default Value; Table 19..................................... 40

Updated Outline Dimensions....................................................... 43

10/10—Revision 0: Initial Version

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