SSD1852Z datasheet(46/55 Pages) ETC

46 / 55 page

SSD1852

Rev 1.0

01/2003

SOLOMON

Table 8 – 6800-Series MPU Parallel Interface Timing Characteristics (VDD - VSS = 1.8, TA = -30 to

+85

°C)

Symbol

Parameter

Min

Typ

Max

Unit

tcycle

Clock Cycle Time (write cycle)

200

tAS

Address Setup Time

tAH

Address Hold Time

tDSW

Write Data Setup Time

tDHW

Write Data Hold Time

tDHR

Read Data Hold Time

tOH

Output Disable Time

tACC

Access Time

PWCSL

Chip Select Low Pulse Width (read RAM)

Chip Select Low Pulse Width (read Command)

Chip Select Low Pulse Width (write)

500

100

PWCSH

Chip Select High Pulse Width (read)

Chip Select High Pulse Width (write)

200

100

Rise Time

Fall Time

Figure 15 – 6800-Series MPU Parallel Interface Characteristics (PS0=H; PS1=H)

D0~D7(WRITE)

D0~D7(READ)

PWCSL

tDHW

tOH

tACC

tDHR

Valid Data

tDSW

Valid Data

tcycle

PWCSH

tAH

tAS

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