CYRF6986

Document Number: 001-66073 Rev. *F

Page 13 of 23

Figure 8. SPI Timing

AC Characteristics

SPI Interface

Parameter [13, 14]

Description

Min

Typ

Max

Unit

SPI Clock Period

238.1

–

–

ns

SPI Clock High Time

100

–

–

ns

SPI Clock Low Time

100

–

–

ns

SPI Input Data Setup Time

25

–

–

ns

SPI Input Data Hold Time

10

–

–

ns

SPI Output Data Valid Time

0

–

50

ns

SPI Output Data Tri-state (MOSI from Slave Select Deassert)

–

–

20

ns

SPI Slave Select Setup Time before first positive edge of SCK[15]

10

–

–

ns

SPI Slave Select Hold Time after last negative edge of SCK

10

–

–

ns

SPI Slave Select Minimum Pulse Width

20

–

–

ns

SPI Slave Select Setup Time

10

–

–

ns

SPI SCK Hold Time

10

–

–

ns

Minimum RST Pin Pulse Width

10

–

–

ns

SCK

nSS

MOSI input

MISO

MOSI output

t

SCK_HI

t

SCK_LO

t

SS_SU

t

SCK_SU

t

SCK_CYC

t

SS_HLD

t

SCK_HLD

t

DAT_SU

t

DAT_HLD

t

DAT_VAL

t

DAT_VAL_TRI

Notes

15. SCK must start low at the time SS goes LOW, otherwise the success of SPI transactions are not guaranteed.