SIP41101 datasheet(3/6 Pages) VISHAY

3 / 6 page

SiP41101

Vishay Siliconix

New Product

Document Number: 72377

S-31578—Rev. A, 11-Aug-03

www.vishay.com

SPECIFICATIONSa

Limits

Test Conditions Unless Specified

VDD = 4.5 to 5.5 V, VBOOT = 4.5 to 30 V, TA = -40 to 85_C

Parameter

Unit

Maxa

Typb

Mina

Test Conditions Unless Specified

VDD = 4.5 to 5.5 V, VBOOT = 4.5 to 30 V, TA = -40 to 85_C

Symbol

MOSFET Drivers

High-Side Rise Timec

trH

10% - 90%

High-Side Fall Timec

tfH

90% - 10%

High Side Propagation Delayc

td(off)H

50% 50%

High-Side Propagation Delayc

DtH-L

50% - 50%

Low-Side Rise Timec

trL

10% - 90%

Low-Side Fall Timec

tfL

90% - 10%

Low Side Propagation Delayc

td(off)L

50% 50%

Low-Side Propagation Delayc

DtL-H

50% - 50%

Notes

The algebraic convention whereby the most negative value is a minimum and the most positive a maximum (-40_ to 85_C).

Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.

Guaranteed by design.

TIMING WAVEFORMS

td(off)H

DtH-L

td(off)L

DtL-H

OUTH

OUTL

TEST SETUP

Figure 1.

SYNC_EN

GND

VDD

GND

VDD

BOOT

OUTH

OUTL

VDD

5 nF

2 nF

1 W

1.5 W

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