MP1475S – HIGH-EFFICIENCY, 3A, 16V, 500kHz SYNCHRONOUS STEP-DOWN CONVERTER

MP1475S Rev. 1.0

www.MonolithicPower.com

16

1/8/2015

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Efficient PCB layout is critical to achieve stable

operation, especially for the placement of the

VCC capacitor and input capacitor. For best

results, refer to Figure 9 and the guidelines

below:

1. Use large ground plane to connect directly

to GND. If the bottom layer is ground plane,

add vias near GND.

2. Place the VCC capacitor as close as

possible to VCC and GND. The trace

length of VCC to the VCC capacitor anode

to the VCC capacitor cathode to GND

should be as short as possible.

3. Place the ceramic input capacitor close to

IN and GND. Keep the connection between

the input capacitor and IN as short and

wide as possible.

4. Route SW and BST away from sensitive

analog areas (such as FB).

5. Place the T-type feedback resistor R6 very

close to the chip to ensure the trace

connected to FB is as short as possible.

Notes:

9) The recommended layout is based on Figure 10 in the “Typical

Application Circuits” section on page 17.

Top Layer

GND

SW

BST

GND

VOUT

EN/SYNC

VCC

Bottom Layer

Figure 9. Recommended PCB Layout

Design Example

Table 2 shows a design example following the

application guidelines for the specifications:

Table 2. Design Example

12V

3.3V

3A

The detailed application schematic is shown in

Figure 11. The typical performance and circuit

waveforms have been shown in the “Typical

Performance Characteristics” section. For more

device applications, please refer to the related

evaluation board datasheets.