MP8869WGL datasheet(29/41 Pages) MPS

29 / 41 page

MP8869W

– 3V - 18V, 12A, SYNCHRONOUS STEP-DOWN CONVERTER

MP8869W Rev. 1.02

www.MonolithicPower.com

1/18/2018

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

3) Reg02 SysCntlreg2

The highest two bits of the PG deglitch time D[7:6]

defines the power good signal rising and falling edge

delay times. When output OVP or UVP is triggered,

the PG signal turns low or high after a delay time.

There are four levels of PG delay time that can be

programmed by the I2C in different conditions.

The two switching frequency bits D[5:4] are used for

switching frequency selection. The MP8869W

supports up to 1.25MHz of switching frequency by

setting the two bits to 11. The MP8869W maximum

programmable switching frequency is limited by

internal minimum on-time (see Table 1).

The bit Soft Stop defines the output voltage

discharge behavior after EN shutdown. When Soft

Stop is set to 0, the output voltage is not controlled

after EN shutdown. When Soft Stop is set to 1, the

output voltage is discharged linearly to zero with the

set soft-stop time.

The lowest three bits, Current Limit Adjust D[2:0],

are used for peak and valley current-limit selection.

There are eight levels of current limit that can be

selected for different application conditions.

NAME

BITS

DEFAULT

DESCRIPTION

PG deglitch

time

D[7:6]

Power good signal rising

and falling edges’ delay time. When FB or VOUT

is out of regulation window, the PG comparator is triggered, but needs a

delay time before the PG signal can turn high or low.

D[7:6]

PG Deglitch

D[7:6]

PG Deglitch

μs

Switching

frequency

D[5:4]

Switching frequency set bit. There is no dedicated frequency oscillator

inside the part. The switching frequency is fairly fixed by controlling the

TON timer.

D[5:4]

Frequency

D[5:4]

Frequency

500kHz

1MHz

750kHz

1.25MHz

Soft stop

D[3]

This bit defines the VOUT discharge behavior after EN shutdown. “0”

means VOUT is not controlled after EN shutdown; “1” means VOUT is

discharged linearly to zero with the set soft-stop time.

Current limit

adjust

D[2:0]

001

D[2:0]

Valley Current Limit (A)

D[2:0]

Valley Current Limit (A)

000

100

8.5

001

101

010

110

011

111

MP8869WGL Datasheet(PDF) 29 Page - Monolithic Power Systems

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