MP9473–HIGH-EFFICIENCY, FAST-TRANSIENT, SYNCHRONOUS, STEP-DOWN CONVERTER

MP9473 Rev. 1.1

www.MonolithicPower.com

16

8/1/2016

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© 2016 MPS. All Rights Reserved.

APPLICATION INFORMATION

Setting the Output Voltage

output voltage to the FB pin.

Without an external ramp, the feedback resistors

follows:

OUT

REF

REF

VV

R1

R2

V





(10)

When using a low-ESR ceramic capacitor on the

output, add an external voltage ramp to the FB

1

4

2

1

1

2

1

2

1







































R

)

V

V

V

(

R

V

V

R

RAMP

REF

OUT

RAMP

REF

(11)

Using equation 11 to calculate the output voltage

improve output-voltage accuracy and simplify the

simplified

circuit

with

external

ramp

compensation and a DC-blocking capacitor.

improve DC-blocking performance.

Cdc

Figure 8: Simplified Circuit with External Ramp

Compensation and DC-Blocking Capacitor

Input Capacitor

The input current to the step-down converter is

discontinuous, requiring a capacitor to supply

the AC current while maintaining the DC-input

voltage. Ceramic capacitors are recommended

for high performance. Place the input capacitors

as close to the IN pin as possible.

The

capacitance

varies

significantly

with

temperature. Capacitors with X5R and X7R

ceramic

dielectrics

are

fairly

stable

over

temperature fluctuations.

The capacitors must have a ripple-current rating

greater than the converter’s maximum input-

ripple current. The input-ripple current can be

estimated as follows:

OUT

OUT

CIN

OUT

IN

IN

VV

II

(1

)

VV



 

(12)

Where,

OUT

CIN

I

I

2



(13)

To simplify calculations, choose an input

capacitor whose RMS-current rating is greater

than half of the maximum load current. The input-

capacitance value determines the input-voltage

ripple of the converter. If there is an input-

voltage-ripple requirement in the system design,

choose an input capacitor that meets the

specification

The input-voltage ripple can be estimated as

follows:

OUT

OUT

OUT

IN

SW

IN

IN

IN

IV

V

V(1

)

FC

V

V





 



(14)

Where,

OUT

IN

SW

IN

I

1

V

4F

C

 



(15)