MP9473–HIGH-EFFICIENCY, FAST-TRANSIENT, SYNCHRONOUS, STEP-DOWN CONVERTER

MP9473 Rev. 1.1

www.MonolithicPower.com

13

8/1/2016

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6

SW

FREQ

IN

DELAY

IN

OUT

10

F(kHz)

96 R

(k )

V

[t

(ns)]

VV







(3)

where,

The MP9473 is optimized for 200kHz-to-1MHz

applications; this enables applications to operate

at high-switching frequencies with high efficiency.

The high-switching frequency allows for smaller

LC-filter components that reduce PCB space

requirements.

Ramp Compensation

Figure 3 and Figure 4 show jitter occurring in

downward slope causes the HS-FET ON time to

deviate from its intended position and produce

jitter. The relationship between system stability

doesn’t affect the noise immunity directly.

Figure 3: Jitter in PWM Mode

Figure 4: Jitter in Skip Mode

Ceramic output capacitors lack enough ESR

ripple to stabilize the system, and require an

external compensation ramp.

I

C4

I

FB

I

I

R4

I

FB

Figure 5: Simplified Circuit in PWM Mode with

External Ramp Compensation

In PWM mode, MP9473 has an equivalent circuit

with HS-FET OFF and uses an external ramp

simplified circuit in Figure 5. Derive the external

12

SW

4

1

2

RR

11

2F

C

5

R

R





 









(4)

then:

R4

C4

FB

C4

II

I

I





(5)

as follows:

OUT

SLOPE1

44

V

V

RC







(6)

instability in PWM mode. If C4 cannot be reduced

further (due to the limitations of equation 4), then

When using POSCAP or types of capacitors with

higher ESR, an external ramp is not necessary.

Figure 6: Simplified Circuit in PWM Mode without

External Ramp Compensation