MP6003 – MONOLITHIC FLYBACK/SEPIC DC-DC CONVERTER

MP6003 Rev. 1.01

www.MonolithicPower.com

8

1/26/2014

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© 2014 MPS. All Rights Reserved.

High Voltage Startup

The MP6003 features a 100V startup circuit,

see Figure 1. When power is applied, the

capacitor at the VCC pin is charged through the

VIN pin. When the voltage at the VCC pin

crosses 6.0V without fault, the controller is

enabled. The VCC pin is then disconnected

4.5V, the VCC pin is reconnected to the VIN pin

VCC pin repeats this ramp cycle between 4.5V

and 6.0V. VIN needs to be higher than 10V in

order to keep high voltage startup circuit

working properly. This can be guaranteed by

setting

input

UVLO ≥ 10V.

It

is

also

recommended that the capacitor at VCC pin be

no less than 1uF to achieve stable operation.

The VCC pin can be powered with a voltage

higher than 4.5V from an auxiliary winding to

reduce the power dissipated in the internal

start-up circuit. The VCC pin is internally

clamped at 8V.

Under-Voltage and Over-Voltage Detection

The MP6003 includes a line monitor circuit.

Two external resistors form a voltage divider

from the input voltage to GND; its tap connects

to the LINE pin. The controller is operational

when the voltage at the UV/OV pin is between

1.2V and 3V. When the voltage at the UV/OV

pin goes out of this operating range, the

controller is disabled and goes into standby

mode. The LINE pin can also be used as a

remote enable. Grounding the UV/OV pin will

disable the controller.

Error Amplifier

The MP6003 includes an error amplifier with its

non-inverting input connected to internal 1.2V

reference voltage. The regulated voltage is fed

back through a resistor network or an

optocoupler to the FB pin. Figure 2 shows some

common error amplifier configurations.

--

+

1.2V

FB

C2

C3

R3

COMP

VCC

C1

PRIMARY

WINDING

R1

R2

D1

EA

34

6

--

+

1.2V

FB

COMP

VCC

C2

R2

R3

(a) Using Primary winding to provide feedback

(b) Feedback is from Secondary (Common Collector)

EA

34

6

Figure 2—Error Amplifier Configurations

Synchronize Programmable Oscillator

The MP6003 oscillating frequency is set by an

external resistor from the RT pin to ground. The

value of RT can be calculated from:

S

f

550kHz

10kΩ

RT

×

=

The MP6003 can be synchronized to an

external clock pulse. The frequency of the clock

pulse must be higher than the internal oscillator

frequency. The clock pulse width should be

within 50ns to 150ns. The external clock can be

coupled to the RT pin with a 100pF capacitor

and a peak level greater than 3.5V.

Duty Cycle Limiting with Line Feed Forward

limit at 67.5% when the LINE pin voltage is

Maximum duty cycle can be calculated by:

%

100

V

V

7

.

2

V

7

.

2

D

LINE

MAX

×

⎥

⎦

⎤

⎢

⎣

⎡

+

=