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MP6004 Datasheet(PDF) 15 Page - Monolithic Power Systems

Part # MP6004
Description  Primary-Side Regulated Flyback/Buck 80V DCDC Converter
PDF  23 Pages
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Manufacturer  MPS [Monolithic Power Systems]
Direct Link  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP6004 Datasheet(HTML) 15 Page - Monolithic Power Systems

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MP6004—PRIMARY-SIDE REGULATED FLYBACK/BUCK 80V DCDC CONVERTER
MP6004 Rev. 1.0
www.MonolithicPower.com
15
4/14/2015
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
Light-Load Control
In flyback mode (if the load decreases),
MP6004
stretches
down
the
frequency
automatically to reduce the power transferring
while keeping the same IPK in each cycle. An
approximate 10 kHz minimum frequency is
applied to detect the output voltage even at a
very light load. During this condition, the
switching IPK jumps between 20 percent of the
normal IPK and 100 percent of the normal IPK to
reduce the power transferring. The MP6004 still
transfers some energy to the output even if
there is no load on the output due to the 10 kHz
minimum frequency. This means that some
load is required to maintain the output voltage,
or else VOUT will rise and trigger an OVP.
In buck mode, the MP6004 has no minimum
frequency limit, so it stretches down to a very
low frequency and regulates the output
automatically even there is no load on the
output.
Frequency Control
By monitoring the auxiliary winding voltage in
flyback mode or monitoring the SW voltage in
buck mode, the MP6004 detects and regulates
the inductor current in DCM. The frequency is
controlled by the peak current, the current ramp
slew rate, and the load current. The maximum
frequency occurs when the MP6004 runs in
critical
conduction
mode,
providing
the
maximum load power. The MP6004 switching
frequency should be lower than 200 kHz in the
design.
Voltage Control
In flyback application, the MP6004 detects the
auxiliary winding voltage from FB1 during the
secondary-side diode conduction period.
Assume the secondary winding is the master,
and the auxiliary winding is the slave. When the
secondary-side
diode
conducts,
the
FB1
voltage is calculated with Equation (6):
A2
FB1
OUT
D1F
S1
2
NR
V(V
V )
NR
R
=×
+
×
+
(6)
Where:
VD1F is the output diode forward-drop voltage.
VOUT is the output voltage.
NA and NS are the turns of the auxiliary winding
and the secondary-side winding, respectively.
R1 and R2 are the resistor dividers for sampling.
The output voltage differs from the secondary-
winding voltage due to the current-dependant
diode forward voltage drop. If the secondary-
winding voltage is always detected at a fixed
secondary current, the difference between the
output voltage and the secondary-winding
voltage is a fixed VD1F. MP6004 starts sampling
the auxiliary-winding voltage after the internal
power MOSFET turns off for 0.7 μs and finishes
the sampling after the secondary-side diode
conducts for 3 μs. This provides good
regulation when the load changes. However,
the secondary diode conducting period must be
longer than 3 μs in each cycle, and the FB1
signal must be smooth 0.7 μs after the switch
turns off.
With a buck solution, there is one FB2 pin
referenced to VIN. It can be used as the
reference voltage for the buck application. The
output voltage is referenced to VIN and does
not have the same GND as the input power.
Programming the Current Limit
The MP6004 current limit is set by an external
resistor (R3) from ILIM to ground. The value of
R3 can be estimated with Equation (7):
L
LIM
V0.18
100
I
R3
L
×
=+
(7)
Where ILIM is the current limit in A, VL is the
voltage applied on the inductor when the
MOSFET turns on, R3 is the setting resistor in
kΩ, and L is the inductor in μH.
The current limit cannot be programmed higher
than 3 A.
Leading-Edge Blanking
Transformer parasitic capacitance induces a
current spike on the sense resistor when the
power switch turns on. The MP6004 includes a
450 ns leading-edge blanking period to avoid
falsely terminating the switching pulse. During
this
blanking
period,
the
current
sense
comparator is disabled, and the gate driver
cannot switch off.



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