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LTC4271 Datasheet(PDF) 5 Page - Linear Technology |
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LTC4271 Datasheet(HTML) 5 Page - Linear Technology |
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5 / 28 page ![]() 5 dc1843bfa DEMO MANUAL DC1843B DEMONSTRATION CIRCUIT 1842B OPERATION Board Layout Proper board layout is crucial for proper LTC4290B/ LTC4271 chipset operation, robustness, and accuracy. When laying out, pay attention to parts placement, Kelvin sensing, power paths, and copper fill. It is imperative to follow the LTC4290B/LTC4271 Layout Guide document when laying out the board. Contact Linear Technology Corporation for this document. Figure 6. DC1842B Digital and Analog Isolation Isolation and Power Supplies The LTC4290B/LTC4271 chipset provides communication across an isolation barrier through a data transformer (Figure 6). This eliminates the need for expensive opto- couplers. All digital pins reside on the digital ground refer- ence and are isolated from the analog PoE supply. A 3.3V supply for VDD and an isolated VEE supply are connected to the DC1842B through the 30-pin connector. VDD33 VDD33 T1 DND CPD CND DPD AGND VEE DNA VEE VEE ISOLATION WÜRTH 7490100143 CPA 30-PIN CONNECTOR DC1842A SIDE DC1680B SIDE VDD33 SUPPLY VEE SUPPLY CNA DPA TX+ RX– CT(4) CT(2) RX+ TX– TD+ RD– CT(3) CT RD+ TD– U1 LTC4271 U2 LTC4290 C23 1µF C21 0.1µF R13 100 DC1843A F06 DGND C19 1µF 100V D1 SMAJ58A R14 100 C22 1µF R15 100 R16 100 R21 100 R35 10 R22 100 R23 100 R24 100 C24, 2nF 2kV TVSBULK CBULK +– +– + |
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