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LTM4631

4631fb

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applicaTions inForMaTion

To obtain a linear voltage proportional to temperature we

cancel the IS variable in the natural logarithm term to

remove the IS dependency from the equation 1. This is

accomplished by measuring the diode voltage at two cur-

rents I1, and I2, where I1 = 10 • I2) and subtracting we get:

ΔVD = T(KELVIN)•KD•IN

– T(KELVIN)•KD•IN

Combining like terms, then simplifying the natural log

terms yields:

ΔVD = T(KELVIN) • KD • lN(10)

and redefining constant

K'D=KD•IN(10) =

198µV

yields

ΔVD = K’D • T(KELVIN)

Solving for temperature:

T(KELVIN)=

ΔVD

K'D

(°CELSIUS)= T(KELVIN)–273.15

where

300°K = 27°C

means that is we take the difference in voltage across the

diode measured at two currents with a ratio of 10, the

resulting voltage is 198μV per Kelvin of the junction with

a zero intercept at 0 Kelvin.

The diode connected PNP transistor between the TEMP

pin and the SGND pin can be used to monitor the internal

temperature of the LTM4631. See Figure 24 for an example.

Thermal Considerations and Output Current Derating

The thermal resistances reported in the Pin Configuration

section of the data sheet are consistent with those param-

eters defined by JESD51-9 and are intended for use with

finite element analysis (FEA) software modeling tools that

leverage the outcome of thermal modeling, simulation,

and correlation to hardware evaluation performed on a

µModule package mounted to a hardware test board—also

defined by JESD51-9 (“Test Boards for Area Array Surface

Mount Package Thermal Measurements”). The motivation

for providing these thermal coefficients is found in JESD

51-12 (“Guidelines for Reporting and Using Electronic

Package Thermal Information”).

Many designers may opt to use laboratory equipment and

a test vehicle such as the demo board to anticipate the

µModule regulator’s thermal performance in their appli-

cation at various electrical and environmental operating

conditions to compliment any FEA activities. Without

FEA software, the thermal resistances reported in the

Pin Configuration section are in-and-of themselves not

relevant to providing guidance of thermal performance;

instead, the derating curves provided in the data sheet can

be used in a manner that yields insight and guidance per-

taining to one’s application-usage, and can be adapted to

correlate thermal performance to one’s own application.

The Pin Configuration section typically gives four thermal

coefficients explicitly defined in JESD 51-12; these coef-

ficients are quoted or paraphrased below:

1. θJA, the thermal resistance from junction to ambient, is

the natural convection junction-to-ambient air thermal

resistance measured in a one cubic foot sealed enclo-

sure. This environment is sometimes referred to as “still

air” although natural convection causes the air to move.

This value is determined with the part mounted to a

JESD 51-9 defined test board, which does not reflect

an actual application or viable operating condition.

2. θJCbottom, the thermal resistance from junction to the

bottom of the product case, is the junction-to-board

thermal resistance with all of the component power

dissipation flowing through the bottom of the pack-

age. In the typical µModule, the bulk of the heat flows

out the bottom of the package, but there is always

heat flow out into the ambient environment. As a

result, this thermal resistance value may be useful

for comparing packages but the test conditions don’t

generally match the user’s application.

3. θJCTOP, the thermal resistance from junction to top of

the product case, is determined with nearly all of the

component power dissipation flowing through the top

of the package. As the electrical connections of the

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