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LTM4647

4647fb

For more information www.linear.com/LTM4647

APPLICATIONS INFORMATION

The LTM4647 accomplishes this by disabling both the top

and bottom MOSFETs until the TRACK/SS pin voltage and

theinternalsoft-startvoltageareabovetheVFBpinvoltage.

N+1 Phase Redundancy and Hot Swap

The HIZB pin can be used to force both top and bottom

MOSFET to turn off while not pulling down the COMPa and

TRACK/SS pins. In a multiphase system N+1 redundancy

can be achieved via the HIZB pin. When combined with a

hot swap controller, such as the LTC4211, the HIZB pin

could be connected to the gate of the hot swap switch.

When a damaged MOSFET triggers the hot swap control-

ler, it also disables the corresponding channel’s power,

disconnecting it. Since COMPa and TRACK/SS pins are

unaffected, it does not affect the rest of the system. The

propagationdelayfromHIZBfallingtobothtopandbottom

MOSFET turned off is <200ns. See Figure 27 for example.

SW Pins and Snubbering Circuit

The SW pin is generally for testing purposes by monitor-

ing the pin. The SW pin can also be used to dampen out

switch node ringing caused by LC parasitic in the switched

current path. Usually a series R-C combination is used

called a snubber circuit. The resistor will dampen the

resonance and the capacitor is chosen to only affect the

high frequency ringing across the resistor.

If the stray inductance or capacitance can be measured or

approximated then a somewhat analytical technique can

be used to select the snubber values. The inductance is

usually easier to predict. It combines the power path board

inductance in combination with the MOSFET interconnect

bond wire inductance.

First the SW pin can be monitored with a wide bandwidth

scope with a high frequency scope probe. The ring fre-

quency can be measured for its value. The impedance Z

can be calculated:

ZL = 2π • f • L

where f is the resonant frequency of the ring, and L is the

total parasitic inductance in the switch path. If a resistor

is selected that is equal to Z, then the ringing should be

dampened. The snubber capacitor value is chosen so that

its impedance is equal to the resistor at the ring frequency.

Calculated by:

ZC =

2π • f •C

These values are a good place to start. Modification to

these components should be made to attenuate the ring-

ing with the least amount the power loss.

Stability Compensation

The LTM4647 has already been internally optimized and

compensated for all output voltages and capacitor combi-

nations including all ceramic capacitor applications when

COMPb is tied to COMPa. Please note that a 22pF to

47pF feedforward capacitor (CFF) is required connecting

from VOUT to VFB pin for all ceramic capacitor application

to achieve high bandwidth control loop compensation

with enough phase margin. Table 5 is provided for most

application requirements using the optimized internal

compensation. For specific optimized requirement, dis-

connect COMPb from COMPa and apply a Type II C-R-C

compensation network from COMPa to SGND to achieve

external compensation. The LTpowerCAD design tool is

available to download online to perform specific control

loop optimization and analyze the control stability and load

transient performance.

SVIN, PVIN, INTVCC AND DRVCC

SVIN is the filtered input voltage to the internal 5.5V LDO

regulator to power the control circuitry of the regulator.

Connect SVIN to VIN through a 2.2Ω and 1µF R-C filter.

INTVCC is the output of the 5.5V LDO. Decouple it with

a minimum 2.2µF ceramic capacitor. Connect INTVCC to

SVIN directly if SVIN is less than 6V.

PVIN is the power input connected to power MOSFETs and

the DRVCC is the supply voltage for the driver circuity to

drive both power MOSFETs. DRVCC could connect to an

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