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LTC3859AL Datasheet(PDF) 16 Page - Linear Technology

Part # LTC3859AL
Description  Low IQ, 60V Synchronous BoostBuck Controller
PDF  42 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC3859AL Datasheet(HTML) 16 Page - Linear Technology

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LTC7813
16
7813f
For more information www.linear.com/LTC7813
operaTion
The switching frequency of the LTC7813’s controllers can
be selected using the FREQ pin.
If the PLLIN/MODE pin is not being driven by an external
clock source, the FREQ pin can be tied to GND, tied to
INTVCCorprogrammedthroughanexternalresistor.Tying
FREQ to GND selects 350kHz while tying FREQ to INTVCC
selects 535kHz. Placing a resistor between FREQ and GND
allows the frequency to be programmed between 50kHz
and 900kHz, as shown in Figure 10.
A phase-locked loop (PLL) is available on the LTC7813
to synchronize the internal oscillator to an external clock
source that is connected to the PLLIN/MODE pin. The
LTC7813’s phase detector adjusts the voltage (through
an internal lowpass filter) of the VCO input to align the
turn-on of TG1 and BG2 to the rising edge of the syn-
chronizing signal.
The VCO input voltage is prebiased to the operating fre-
quency set by the FREQ pin before the external clock is
applied. If prebiased near the external clock frequency,
the PLL loop only needs to make slight changes to the
VCO input in order to synchronize the rising edge of the
external clock’s to the rising edge of TG1 and BG2. The
ability to prebias the loop filter allows the PLL to lock-in
rapidly without deviating far from the desired frequency.
The typical capture range of the LTC7813’s phase-locked
loop is from approximately 55kHz to 1MHz, with a guaran-
tee to be between 75kHz and 850kHz. In other words, the
LTC7813’s PLL is guaranteed to lock to an external clock
source whose frequency is between 75kHz and 850kHz.
The typical input clock thresholds on the PLLIN/MODE
pin are 1.6V (rising) and 1.1V (falling). It is recommended
that the external clock source swings from ground (0V)
to at least 2.5V.
Boost Controller Operation When VIN2 > VOUT2
When the input voltage to the boost channel rises above
its regulated VOUT2 voltage, the controller can behave
differently depending on the mode, inductor current and
VIN2 voltage. In forced continuous mode, the loop works
to keep the top MOSFET on continuously once VIN2 rises
above VOUT2. An internal charge pump delivers current to
the boost capacitor from the BOOST2 pin to maintain a
sufficiently high TG2 voltage. Because the LTC7813 uses
internal switches and does not require external bootstrap
diodes, the charge pump only has to overcome small
leakage currents (board leakage, etc.).
In pulse-skipping mode, if VIN is between 0% and 10%
above the regulated VOUT2 voltage, TG2 turns on if the
inductor current rises above approximately 3% of the
programmed ILIM current. If the part is programmed in
Burst Mode operation under this same VIN2 window, then
TG2 turns on at the same threshold current as long as
the chip is awake (the buck channel is awake and switch-
ing). If the buck channel is asleep or shut down in this
VIN2 window, then TG2 will remain off regardless of the
inductor current.
If VIN rises more than 10% above the regulated VOUT
voltage in any mode, the controller turns on TG2 regard-
less of the inductor current. In Burst Mode operation,
however, the internal charge pump turns off if the entire
chip is asleep (if the buck channel is also asleep or shut
down). With the charge pump off, there would be nothing
to prevent the boost capacitor from discharging, result-
ing in an insufficient TG2 voltage needed to keep the top
MOSFET completely on. The charge pump turns back on
when the chip wakes up, and it remains on as long as the
buck channel is actively switching.
Boost Controller at Low SENSE Pin Common Voltage
The current comparator of the boost controller is powered
directly from the SENSE2+ pin and can operate to voltages
as low as 2.2V. Since this is lower than the VBIAS UVLO of
the chip, VBIAS can be connected to the output of the boost
controller, as illustrated in the typical application circuit in
Figure 12. This allows the boost controller to handle input
voltage transients down to 2.2V while maintaining output
voltage regulation. If SENSE2+ falls below 2.0V, then
switching stops and SS2 is pulled low. If SENSE2+ rises
back above 2.2V, the SS2 pin will be released, initiating a
new soft-start sequence.
(Refer to the Functional Diagrams)



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