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LTC2321-16

232116fc

For more information www.linear.com/LTC2321-16

applicaTions inForMaTion

need not be set at VREF/2, but at some point within the

VDD rails allowing the alternate input to swing symmetri-

cally around this voltage. If the input signal (AIN+ – AIN–)

swings beyond ±REFOUT/2, valid codes will be generated

by the ADC and must be clamped by the user, if necessary.

Pseudo-Differential Unipolar Input Range

The pseudo-differential unipolar configuration represents

driving one of the analog inputs at ground and applying a

signal to the other AIN pin. In this case, the analog input

swings between ground and VREF yielding unipolar two’s

complement output codes with an ADC span of half of full-

scale. This configuration is illustrated in Figure 6, and the

corresponding transfer function in Figure 7. If the input

signal (AIN+ – AIN–) swings negative, valid codes will be

generated by the ADC and must be clamped by the user,

if necessary.

Figure 6. Pseudo-Differential Unipolar Application Circuit

Figure 7. Pseudo-Differential Unipolar Transfer Function

232116 F07

–VREF

–16384

16383

–32768

32767

VREF

DOTTED REGIONS AVAILABLE

BUT UNUSED

AIN

(AIN+ – AIN–)

ADC CODE

(2’s COMPLEMENT)

–VREF/2

VREF/2

220pF

VREF

–

LTC2321-16

LT1818

232116 F06

SDO1

VBYP1

REFOUT1

CLKOUT

AIN1–

AIN1+

SCK

TO CONTROL

LOGIC

(FPGA, CPLD,

DSP, ETC.)

1µF

10µF

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