LT1806 datasheet(9/26 Pages) LINER

9 / 26 page

LTC2321-16

232116fc

For more information www.linear.com/LTC2321-16

pin FuncTions

VBYP2 (Pin 24): Bypass this internally supplied pin to

ground with a 1µF ceramic capacitor. The nominal output

voltage on this pin is 1.6V

CMOS/LVDS (Pin 25): I/O Mode Select. Ground this pin

to enable CMOS mode, tie to OVDD to enable LVDS mode.

Float this pin to enable low power LVDS mode.

REFOUT2 (Pin 26): Reference Buffer 2 Output. An onboard

buffer nominally outputs 4.096V to this pin. This pin is

referred to REFRTN2 and should be decoupled closely to

the pin (no vias) with a 0.1µF (X7R, 0402 size) capacitor

and a 10μF (X5R, 0805 size) ceramic capacitor in paral-

lel. The internal buffer driving this pin may be disabled

by grounding the REFINT pin. If the buffer is disabled,

an external reference may drive this pin in the range of

1.25V to VDD.

REFRTN2 (Pin 27): Reference Buffer 2 Output Return.

Bypass REFRTN2 to REFOUT2. Do not tie the REFRTN2

pin to the ground plane.

REFINT (Pin 28): Reference Buffer Output Enable. Tie to

VDD when using the internal reference. Tie to ground to

disable the internal REFOUT1 and REFOUT2 buffers for

use with external voltage references. This pin has a 500k

internal pull-up to VDD.

Exposed Pad (Pin 29): Ground. Solder this pad to ground.

LT1806 Datasheet(PDF) 9 Page - Linear Technology